diff options
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2016-11-30 15:21:11 +0000 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2016-12-05 14:55:35 +0000 |
| commit | a806dad58c4cf752238d7bbffbc9a1ce17f63cea (patch) | |
| tree | 9981b72bc40a9169972103ca315549d8a35bb052 /bl32 | |
| parent | c59428b1502f37c9b2f551613da1b491c4226d10 (diff) | |
Define and use no_ret macro where no return is expected
There are many instances in ARM Trusted Firmware where control is
transferred to functions from which return isn't expected. Such jumps
are made using 'bl' instruction to provide the callee with the location
from which it was jumped to. Additionally, debuggers infer the caller by
examining where 'lr' register points to. If a 'bl' of the nature
described above falls at the end of an assembly function, 'lr' will be
left pointing to a location outside of the function range. This misleads
the debugger back trace.
This patch defines a 'no_ret' macro to be used when jumping to functions
from which return isn't expected. The macro ensures to use 'bl'
instruction for the jump, and also, for debug builds, places a 'nop'
instruction immediately thereafter (unless instructed otherwise) so as
to leave 'lr' pointing within the function range.
Change-Id: Ib34c69fc09197cfd57bc06e147cc8252910e01b0
Co-authored-by: Douglas Raillard <douglas.raillard@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'bl32')
| -rw-r--r-- | bl32/tsp/aarch64/tsp_entrypoint.S | 8 | ||||
| -rw-r--r-- | bl32/tsp/aarch64/tsp_exceptions.S | 28 |
2 files changed, 18 insertions, 18 deletions
diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S index 453d2c14..25385caa 100644 --- a/bl32/tsp/aarch64/tsp_entrypoint.S +++ b/bl32/tsp/aarch64/tsp_entrypoint.S @@ -391,7 +391,7 @@ tsp_sel1_intr_return: /* Should never reach here */ tsp_sel1_int_entry_panic: - bl plat_panic_handler + no_ret plat_panic_handler endfunc tsp_sel1_intr_entry /*--------------------------------------------- @@ -409,7 +409,7 @@ func tsp_cpu_resume_entry restore_args_call_smc /* Should never reach here */ - bl plat_panic_handler + no_ret plat_panic_handler endfunc tsp_cpu_resume_entry /*--------------------------------------------- @@ -422,7 +422,7 @@ func tsp_fast_smc_entry restore_args_call_smc /* Should never reach here */ - bl plat_panic_handler + no_ret plat_panic_handler endfunc tsp_fast_smc_entry /*--------------------------------------------- @@ -439,5 +439,5 @@ func tsp_std_smc_entry restore_args_call_smc /* Should never reach here */ - bl plat_panic_handler + no_ret plat_panic_handler endfunc tsp_std_smc_entry diff --git a/bl32/tsp/aarch64/tsp_exceptions.S b/bl32/tsp/aarch64/tsp_exceptions.S index 20e40dfb..400d5c62 100644 --- a/bl32/tsp/aarch64/tsp_exceptions.S +++ b/bl32/tsp/aarch64/tsp_exceptions.S @@ -105,19 +105,19 @@ vector_base tsp_exceptions * ----------------------------------------------------- */ vector_entry sync_exception_sp_el0 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size sync_exception_sp_el0 vector_entry irq_sp_el0 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size irq_sp_el0 vector_entry fiq_sp_el0 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size fiq_sp_el0 vector_entry serror_sp_el0 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size serror_sp_el0 @@ -127,7 +127,7 @@ vector_entry serror_sp_el0 * ----------------------------------------------------- */ vector_entry sync_exception_sp_elx - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size sync_exception_sp_elx vector_entry irq_sp_elx @@ -139,7 +139,7 @@ vector_entry fiq_sp_elx check_vector_size fiq_sp_elx vector_entry serror_sp_elx - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size serror_sp_elx @@ -149,19 +149,19 @@ vector_entry serror_sp_elx * ----------------------------------------------------- */ vector_entry sync_exception_aarch64 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size sync_exception_aarch64 vector_entry irq_aarch64 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size irq_aarch64 vector_entry fiq_aarch64 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size fiq_aarch64 vector_entry serror_aarch64 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size serror_aarch64 @@ -171,17 +171,17 @@ vector_entry serror_aarch64 * ----------------------------------------------------- */ vector_entry sync_exception_aarch32 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size sync_exception_aarch32 vector_entry irq_aarch32 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size irq_aarch32 vector_entry fiq_aarch32 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size fiq_aarch32 vector_entry serror_aarch32 - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size serror_aarch32 |