diff options
| author | Paul Beesley <paul.beesley@arm.com> | 2019-01-11 18:26:51 +0000 |
|---|---|---|
| committer | Paul Beesley <paul.beesley@arm.com> | 2019-01-15 15:16:02 +0000 |
| commit | 8aabea3358670f26cfa9eb99f8cd935d928f6da0 (patch) | |
| tree | d8c5c20d785e36d8d77b6ff06f000775a5a89236 /bl31 | |
| parent | fe77b53e32692fc5d35df208e2b3d21a28f6228b (diff) | |
Correct typographical errors
Corrects typos in core code, documentation files, drivers, Arm
platforms and services.
None of the corrections affect code; changes are limited to comments
and other documentation.
Change-Id: I5c1027b06ef149864f315ccc0ea473e2a16bfd1d
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Diffstat (limited to 'bl31')
| -rw-r--r-- | bl31/bl31.ld.S | 4 | ||||
| -rw-r--r-- | bl31/bl31_main.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/bl31/bl31.ld.S b/bl31/bl31.ld.S index 5925e0ca..777115a6 100644 --- a/bl31/bl31.ld.S +++ b/bl31/bl31.ld.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -240,7 +240,7 @@ SECTIONS * Time-stamps are stored in normal .bss memory * * The compiler will allocate enough memory for one CPU's time-stamps, - * the remaining memory for other CPU's is allocated by the + * the remaining memory for other CPUs is allocated by the * linker script */ . = ALIGN(CACHE_WRITEBACK_GRANULE); diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c index 927cda2f..da35f75e 100644 --- a/bl31/bl31_main.c +++ b/bl31/bl31_main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -68,7 +68,7 @@ void __init bl31_lib_init(void) * before passing control to the bootloader or an Operating System. This * function calls runtime_svc_init() which initializes all registered runtime * services. The run time services would setup enough context for the core to - * swtich to the next exception level. When this function returns, the core will + * switch to the next exception level. When this function returns, the core will * switch to the programmed exception level via. an ERET. ******************************************************************************/ void bl31_main(void) @@ -96,13 +96,13 @@ void bl31_main(void) * decide which is the next image (BL32 or BL33) and how to execute it. * If the SPD runtime service is present, it would want to pass control * to BL32 first in S-EL1. In that case, SPD would have registered a - * function to intialize bl32 where it takes responsibility of entering + * function to initialize bl32 where it takes responsibility of entering * S-EL1 and returning control back to bl31_main. Once this is done we * can prepare entry into BL33 as normal. */ /* - * If SPD had registerd an init hook, invoke it. + * If SPD had registered an init hook, invoke it. */ if (bl32_init != NULL) { INFO("BL31: Initializing BL32\n"); |