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author | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-06-02 11:40:35 +0100 |
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committer | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-06-16 21:30:32 +0100 |
commit | 5e910074245fa180cfbe70d3c8bceeff1eaa026e (patch) | |
tree | 8547c9ddb62604838baf4b904e1a121335fe0f20 /bl31/bl31_main.c | |
parent | dbc64b39c9193f0b582d706bcf0d04e0a7bf4944 (diff) |
Per-cpu data cache restructuring
This patch prepares the per-cpu pointer cache for wider use by:
* renaming the structure to cpu_data and placing in new header
* providing accessors for this CPU, or other CPUs
* splitting the initialization of the TPIDR pointer from the
initialization of the cpu_data content
* moving the crash stack initialization to a crash stack function
* setting the TPIDR pointer very early during boot
Change-Id: Icef9004ff88f8eb241d48c14be3158087d7e49a3
Diffstat (limited to 'bl31/bl31_main.c')
-rw-r--r-- | bl31/bl31_main.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c index 6765e60e..5bb11ba3 100644 --- a/bl31/bl31_main.c +++ b/bl31/bl31_main.c @@ -97,7 +97,6 @@ void bl31_main(void) */ assert(cm_get_context(NON_SECURE)); cm_set_next_eret_context(NON_SECURE); - cm_init_pcpu_ptr_cache(); write_vbar_el3((uint64_t) runtime_exceptions); isb(); next_image_type = NON_SECURE; |