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| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2019-09-18 14:30:09 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-09-18 14:30:09 +0000 |
| commit | ea735643cb59eeaca0619c625d77c33ab156b520 (patch) | |
| tree | 7e579219db5bf87c54fca5fb5edcf975963868c6 /bl1/bl1_main.c | |
| parent | 5f2849b64ab2da0572247c75be99c63e28e603fa (diff) | |
| parent | ee006a79f622b39a35beaaf95d7b42b7078823f8 (diff) | |
Merge changes from topic "db/unsigned_long" into integration
* changes:
Unsigned long should not be used as per coding guidelines
SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
Diffstat (limited to 'bl1/bl1_main.c')
| -rw-r--r-- | bl1/bl1_main.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/bl1/bl1_main.c b/bl1/bl1_main.c index df01dbae..2bb85114 100644 --- a/bl1/bl1_main.c +++ b/bl1/bl1_main.c @@ -49,7 +49,7 @@ void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout, bl2_mem_layout->total_base = bl1_mem_layout->total_base; bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base; - flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t)); + flush_dcache_range((uintptr_t)bl2_mem_layout, sizeof(meminfo_t)); } /******************************************************************************* |