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| author | danh-arm <dan.handley@arm.com> | 2014-04-15 09:39:47 +0100 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2014-04-15 09:39:47 +0100 |
| commit | 9c2c763d22469b0f73d76469442b474c08497e7a (patch) | |
| tree | 9f5df4a46f1dc38cb3b0fe5f44ec830779e9322b /bl1/aarch64 | |
| parent | 4b79cce54d0978817caba335d57c529f510f86e6 (diff) | |
| parent | 0a30cf54af7bb1f77b405062b1d5b44e809d0290 (diff) | |
Merge pull request #36 from athoelke/at/gc-sections-80
Using GCC --gc-sections to eliminate unused code and data
Diffstat (limited to 'bl1/aarch64')
| -rw-r--r-- | bl1/aarch64/bl1_entrypoint.S | 5 | ||||
| -rw-r--r-- | bl1/aarch64/bl1_exceptions.S | 3 |
2 files changed, 3 insertions, 5 deletions
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S index dc63f394..012b779c 100644 --- a/bl1/aarch64/bl1_entrypoint.S +++ b/bl1/aarch64/bl1_entrypoint.S @@ -29,12 +29,11 @@ */ #include <arch.h> +#include <asm_macros.S> .globl bl1_entrypoint - .section .text, "ax"; .align 3 - /* ----------------------------------------------------- * bl1_entrypoint() is the entry point into the trusted * firmware code when a cpu is released from warm or @@ -42,7 +41,7 @@ * ----------------------------------------------------- */ -bl1_entrypoint: ; .type bl1_entrypoint, %function +func bl1_entrypoint /* --------------------------------------------- * Perform any processor specific actions upon * reset e.g. cache, tlb invalidations etc. diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S index a80d1788..e57f2288 100644 --- a/bl1/aarch64/bl1_exceptions.S +++ b/bl1/aarch64/bl1_exceptions.S @@ -178,8 +178,7 @@ SErrorA32: .align 7 - .section .text, "ax" -process_exception: +func process_exception sub sp, sp, #0x40 stp x0, x1, [sp, #0x0] stp x2, x3, [sp, #0x10] |