diff options
| author | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-04-28 12:32:02 +0100 |
|---|---|---|
| committer | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-05-07 11:29:50 +0100 |
| commit | 7935d0a59d439c993b79814ab414d37e4a90d9a6 (patch) | |
| tree | b441893641316f785bf782b24ac8877252eb8afb /bl1/aarch64 | |
| parent | 2f5dcfef1db42f3b073ae657f8a94925abecd768 (diff) | |
Access system registers directly in assembler
Instead of using the system register helper functions to read
or write system registers, assembler coded functions should
use MRS/MSR instructions. This results in faster and more
compact code.
This change replaces all usage of the helper functions with
direct register accesses.
Change-Id: I791d5f11f257010bb3e6a72c6c5ab8779f1982b3
Diffstat (limited to 'bl1/aarch64')
| -rw-r--r-- | bl1/aarch64/bl1_entrypoint.S | 4 | ||||
| -rw-r--r-- | bl1/aarch64/bl1_exceptions.S | 10 |
2 files changed, 6 insertions, 8 deletions
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S index e25386f7..c081af48 100644 --- a/bl1/aarch64/bl1_entrypoint.S +++ b/bl1/aarch64/bl1_entrypoint.S @@ -97,10 +97,10 @@ _wait_for_entrypoint: * their turn to be woken up * --------------------------------------------- */ - bl read_mpidr + mrs x0, mpidr_el1 bl platform_get_entrypoint cbnz x0, _do_warm_boot - bl read_mpidr + mrs x0, mpidr_el1 bl platform_is_primary_cpu cbnz x0, _do_cold_boot diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S index 71fd4cd7..a87b20f5 100644 --- a/bl1/aarch64/bl1_exceptions.S +++ b/bl1/aarch64/bl1_exceptions.S @@ -189,7 +189,7 @@ func process_exception mov x0, #SYNC_EXCEPTION_AARCH64 bl plat_report_exception - bl read_esr_el3 + mrs x0, esr_el3 ubfx x1, x0, #ESR_EC_SHIFT, #ESR_EC_LENGTH cmp x1, #EC_AARCH64_SMC b.ne panic @@ -201,10 +201,8 @@ func process_exception mov x2, x3 mov x3, x4 bl display_boot_progress - mov x0, x20 - bl write_elr - mov x0, x21 - bl write_spsr + msr elr_el3, x20 + msr spsr_el3, x21 ubfx x0, x21, #MODE_EL_SHIFT, #2 cmp x0, #MODE_EL3 b.ne skip_mmu_teardown @@ -216,7 +214,7 @@ func process_exception * --------------------------------------------- */ bl disable_mmu_icache_el3 - bl tlbialle3 + tlbi alle3 skip_mmu_teardown: ldp x6, x7, [sp, #0x30] ldp x4, x5, [sp, #0x20] |