diff options
| author | Jacky Bai <ping.bai@nxp.com> | 2021-03-09 14:51:28 +0800 |
|---|---|---|
| committer | Jacky Bai <ping.bai@nxp.com> | 2021-03-26 14:45:17 +0800 |
| commit | ed66400156db65fca3f69aae2536282555b63798 (patch) | |
| tree | df1d8e430e35b308651fc4b0c8a154f1f2ee385d | |
| parent | 5f103fc89151f8fbdafd5cce8d2a2c9b59e27715 (diff) | |
MLK-25321 plat: imx8m: Add 4000mts frequency config on imx8m
Add the PLL frequency config for 4000mts.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 3409e57d59ee897e519d87d20ada926638f6be4d)
| -rw-r--r-- | plat/imx/imx8m/ddr/clock.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/plat/imx/imx8m/ddr/clock.c b/plat/imx/imx8m/ddr/clock.c index 7ddc25cc..7eb989f9 100644 --- a/plat/imx/imx8m/ddr/clock.c +++ b/plat/imx/imx8m/ddr/clock.c @@ -84,6 +84,9 @@ void dram_pll_init(unsigned int drate) mmio_clrbits_32(DRAM_PLL_CTRL, (1 << 9)); switch (drate) { + case 4000: + mmio_write_32(DRAM_PLL_CTRL + 0x4, (250 << 12) | (3 << 4) | 1); + break; case 3200: mmio_write_32(DRAM_PLL_CTRL + 0x4, (200 << 12) | (3 << 4) | 1); break; |