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authorJacky Bai <ping.bai@nxp.com>2020-06-30 17:35:30 +0800
committerJacky Bai <ping.bai@nxp.com>2020-07-01 16:12:48 +0800
commitaa3fee73c322ccc664f9b7715412d929e55c914f (patch)
tree0c55598504b5f430eb1a4ff05a5d102823afbf6a
parent2eb979f144f1c008f64d4550035ece0ad69a2365 (diff)
MLK-24360 plat: imx8mp: fix the vpu noc nttp handshake hang issue
The VC8000E's clock should be gated before power up it to make sure the noc port can be synced successfully during vc8000e reset. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
-rw-r--r--plat/imx/imx8m/imx8mp/gpc.c6
-rw-r--r--plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c1
-rw-r--r--plat/imx/imx8m/imx8mp/include/platform_def.h2
3 files changed, 9 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mp/gpc.c b/plat/imx/imx8m/imx8mp/gpc.c
index 89631a24..a414465b 100644
--- a/plat/imx/imx8m/imx8mp/gpc.c
+++ b/plat/imx/imx8m/imx8mp/gpc.c
@@ -362,6 +362,9 @@ void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on)
mmio_write_32(0x32fc0050, 0x7ffff87e);
}
+ if (domain_id == VPU_H1)
+ mmio_clrbits_32(IMX_VPU_BLK_BASE + 0x4, BIT(2));
+
/* clear the PGC bit */
mmio_clrbits_32(IMX_GPC_BASE + pwr_domain->pgc_offset, 0x1);
@@ -389,6 +392,9 @@ void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on)
/* enable HSIOMIX clock */
mmio_write_32 (0x32f10000, 0x2);
+ if (domain_id == VPU_H1)
+ mmio_setbits_32(IMX_VPU_BLK_BASE + 0x4, BIT(2));
+
/* handle the ADB400 sync */
if (!pwr_domain->init_on && pwr_domain->need_sync) {
/* clear adb power down request */
diff --git a/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c b/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c
index 1e5d64da..d24b136c 100644
--- a/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c
+++ b/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c
@@ -42,6 +42,7 @@ static const mmap_region_t imx_mmap[] = {
MAP_REGION_FLAT(IMX_ROM_BASE, IMX_ROM_SIZE, MT_MEMORY | MT_RO), /* ROM code */
MAP_REGION_FLAT(IMX_DRAM_BASE, IMX_DRAM_SIZE, MT_MEMORY | MT_RW | MT_NS), /* DRAM */
MAP_REGION_FLAT(IMX_NOC_BASE, IMX_NOC_SIZE, MT_DEVICE | MT_RW), /* NOC QoS */
+ MAP_REGION_FLAT(IMX_VPU_BLK_BASE, IMX_VPU_BLK_SIZE, MT_DEVICE | MT_RW), /* VPU BLK CTL */
{0},
};
diff --git a/plat/imx/imx8m/imx8mp/include/platform_def.h b/plat/imx/imx8m/imx8mp/include/platform_def.h
index ce279a56..e869f52d 100644
--- a/plat/imx/imx8m/imx8mp/include/platform_def.h
+++ b/plat/imx/imx8m/imx8mp/include/platform_def.h
@@ -94,6 +94,8 @@
#define IMX_CAAM_RAM_SIZE U(0x10000)
#define IMX_DRAM_BASE U(0x40000000)
#define IMX_DRAM_SIZE U(0xc0000000)
+#define IMX_VPU_BLK_BASE U(0x38330000)
+#define IMX_VPU_BLK_SIZE U(0x10000)
#define IMX_GIC_BASE PLAT_GICD_BASE
#define IMX_GIC_SIZE U(0x200000)