diff options
| author | Jacky Bai <ping.bai@nxp.com> | 2020-06-30 17:12:36 +0800 |
|---|---|---|
| committer | Jacky Bai <ping.bai@nxp.com> | 2020-07-20 17:06:06 +0800 |
| commit | a97de4c8079ec04f22b4f0881fe20efb696f2fef (patch) | |
| tree | 0260cc0c6bd07629b6153ef4a6fa47c73dd7ca40 | |
| parent | aa3fee73c322ccc664f9b7715412d929e55c914f (diff) | |
MLK-24414 plat: imx8mp: Add the dsp low power audio basic support
if LPA buffer is in OCRAM, then the LPA flag is 0xD,
if LPA buffer is in DRAM, then the LPA flag is 0x1D.
when audio buffer is in DRAM, then DRAM can be put into
retention when A53 is suspended.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Tested-by: Bing Song <bing.song@nxp.com>
| -rw-r--r-- | plat/imx/imx8m/gpc_common.c | 9 | ||||
| -rw-r--r-- | plat/imx/imx8m/imx8mp/imx8mp_psci.c | 7 |
2 files changed, 15 insertions, 1 deletions
diff --git a/plat/imx/imx8m/gpc_common.c b/plat/imx/imx8m/gpc_common.c index 7a8837ef..62ed3ba9 100644 --- a/plat/imx/imx8m/gpc_common.c +++ b/plat/imx/imx8m/gpc_common.c @@ -23,6 +23,8 @@ #define FSL_SIP_CONFIG_GPC_PM_DOMAIN 0x03 #define M4_LPA_ACTIVE 0x5555 +#define DSP_LPA_ACTIVE 0xD +#define DSP_LPA_DRAM_ACTIVE 0x1D #define M4_LPA_IDLE 0x0 static uint32_t gpc_imr_offset[] = { @@ -41,7 +43,12 @@ struct plat_gic_ctx imx_gicv3_ctx; bool imx_m4_lpa_active(void) { - return mmio_read_32(IMX_SRC_BASE + LPA_STATUS) == M4_LPA_ACTIVE; + uint32_t lpa_status; + + lpa_status = mmio_read_32(IMX_SRC_BASE + LPA_STATUS); + + return (lpa_status == M4_LPA_ACTIVE || lpa_status == DSP_LPA_ACTIVE || + lpa_status == DSP_LPA_DRAM_ACTIVE); } bool imx_is_m4_enabled(void) diff --git a/plat/imx/imx8m/imx8mp/imx8mp_psci.c b/plat/imx/imx8m/imx8mp/imx8mp_psci.c index 6c938b7b..2aa34e64 100644 --- a/plat/imx/imx8m/imx8mp/imx8mp_psci.c +++ b/plat/imx/imx8m/imx8mp/imx8mp_psci.c @@ -57,6 +57,9 @@ void imx_domain_suspend(const psci_power_state_t *target_state) imx_anamix_override(true); imx_noc_wrapper_pre_suspend(core_id); } else { + /* flag 0xD means DSP LPA buffer is in OCRAM */ + if (mmio_read_32(IMX_SRC_BASE + 0x98) == 0xD) + dram_enter_retention(); /* * when A53 don't enter DSM, only need to * set the system wakeup option. @@ -78,6 +81,10 @@ void imx_domain_suspend_finish(const psci_power_state_t *target_state) dram_exit_retention(); imx_set_sys_lpm(core_id, false); } else { + /* flag 0xD means DSP LPA buffer is in OCRAM */ + if (mmio_read_32(IMX_SRC_BASE + 0x98) == 0xD) + dram_exit_retention(); + imx_set_sys_wakeup(core_id, false); } } |