diff options
author | Jacky Bai <ping.bai@nxp.com> | 2020-10-19 15:45:16 +0800 |
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committer | Jacky Bai <ping.bai@nxp.com> | 2020-10-19 16:58:00 +0800 |
commit | 6534c0e24d3fb7e985d936a4e93e9fe8b08c5187 (patch) | |
tree | 1dcd113bb8ad1cc15963a56642480217d1c0df0b | |
parent | 4618a84c133536a122dad90950bf790d9748e4d5 (diff) |
MLK-24897 plat: imx8m: Add dram pll setting for 3200mts
Add DRAM PLL frequency setting for 3200mts.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
-rw-r--r-- | plat/imx/imx8m/ddr/clock.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/plat/imx/imx8m/ddr/clock.c b/plat/imx/imx8m/ddr/clock.c index b724d2f6..7ddc25cc 100644 --- a/plat/imx/imx8m/ddr/clock.c +++ b/plat/imx/imx8m/ddr/clock.c @@ -84,6 +84,9 @@ void dram_pll_init(unsigned int drate) mmio_clrbits_32(DRAM_PLL_CTRL, (1 << 9)); switch (drate) { + case 3200: + mmio_write_32(DRAM_PLL_CTRL + 0x4, (200 << 12) | (3 << 4) | 1); + break; case 2400: mmio_write_32(DRAM_PLL_CTRL + 0x4, (300 << 12) | (3 << 4) | 2); break; |