diff options
| author | Jacky Bai <ping.bai@nxp.com> | 2020-03-27 20:42:21 +0800 |
|---|---|---|
| committer | Jacky Bai <ping.bai@nxp.com> | 2020-03-27 20:52:50 +0800 |
| commit | ed6eee177da175128578a7ae21b3bf5f66d9c7e1 (patch) | |
| tree | 277878bd417b531efeaa6c89e82158867b74d8b5 | |
| parent | 81f6715805917f0e94deb7437d601e7698516bfa (diff) | |
plat: imx8m: update the wdog config for system reset
Current reset uses WDOG timeout function and default timeout
value is set to 0.5 second. However, it is better to trigger
reset immediately to speed up reboot process as well as prevent
the scenario of WDOG_B toggling later than CPU reset and PMIC
does NOT reset.
Set the WDE bit when IMX_WDOG_B_RESET is not enabled, or
reboot will fail.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
| -rw-r--r-- | plat/imx/imx8m/imx8m_psci_common.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/plat/imx/imx8m/imx8m_psci_common.c b/plat/imx/imx8m/imx8m_psci_common.c index f646de62..452958ce 100644 --- a/plat/imx/imx8m/imx8m_psci_common.c +++ b/plat/imx/imx8m/imx8m_psci_common.c @@ -176,10 +176,11 @@ void __dead2 imx_system_reset(void) /* WDOG_B reset */ val = mmio_read_16(wdog_base); #ifdef IMX_WDOG_B_RESET - val = (val & 0x00FF) | WDOG_WCR_WDZST | WDOG_WCR_WDE | - WDOG_WCR_WDT | WDOG_WCR_SRS; + val = (val & 0x001F) | WDOG_WCR_WDZST | WDOG_WCR_WDE | + WDOG_WCR_WDT | WDOG_WCR_SRS | BIT(8); #else - val = (val & 0x00FF) | WDOG_WCR_WDZST | WDOG_WCR_SRS; + val = (val & 0x00FF) | WDOG_WCR_WDZST | WDOG_WCR_WDE | + WDOG_WCR_WDA; #endif mmio_write_16(wdog_base, val); |