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authorTeo Hall <teo.hall@nxp.com>2017-05-03 17:46:41 -0500
committerAnson Huang <Anson.Huang@nxp.com>2017-07-12 23:17:24 +0800
commit828f5880c04d0e2acb1f0fc945ee22d5217478b3 (patch)
tree371a15e446d9bd753622175d95367d362b85527a
parenteace8f82713d5d4292a5723a959a3ef3dd3a33c1 (diff)
update secure partition and add NS access
add more resources to secure partition for protection. Also add in functionality to allow for register access of some secure-owned peripherals. These peripherals will still be protected from power or clk changes. Signed-off-by: Teo Hall <teo.hall@nxp.com>
-rw-r--r--plat/freescale/imx8qm/imx8qm_bl31_setup.c6
-rw-r--r--plat/freescale/imx8qm/include/sec_rsrc.h27
2 files changed, 25 insertions, 8 deletions
diff --git a/plat/freescale/imx8qm/imx8qm_bl31_setup.c b/plat/freescale/imx8qm/imx8qm_bl31_setup.c
index 257ce7fc..fc52e453 100644
--- a/plat/freescale/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/freescale/imx8qm/imx8qm_bl31_setup.c
@@ -206,6 +206,12 @@ void mx8_partition_resources(void)
/* move all movable resources and pins to non-secure partition */
err = sc_rm_move_all(ipc_handle, secure_part, os_part, true, true);
+ /* iterate through peripherals to give NS OS part access */
+ for(i = 0; i<(sizeof(ns_access_allowed)/sizeof(sc_rsrc_t)); i++){
+ err = sc_rm_set_peripheral_permissions(ipc_handle, ns_access_allowed[i],
+ os_part, SC_RM_PERM_FULL);
+ }
+
/*
* sc_rm_set_peripheral_permissions
*
diff --git a/plat/freescale/imx8qm/include/sec_rsrc.h b/plat/freescale/imx8qm/include/sec_rsrc.h
index df3ccfdd..b05f0aa0 100644
--- a/plat/freescale/imx8qm/include/sec_rsrc.h
+++ b/plat/freescale/imx8qm/include/sec_rsrc.h
@@ -1,14 +1,25 @@
/* Copyright 2017 NXP */
/* Include file detailing the resource partitioning for ATF */
-
-
-
-
+/* resources that are going to stay in secure partition */
sc_rsrc_t secure_rsrcs[] = {
- SC_R_MU_1A
+ SC_R_MU_1A,
+ SC_R_A53,
+ SC_R_A53_0,
+ SC_R_A53_1,
+ SC_R_A53_2,
+ SC_R_A53_3,
+ SC_R_A72,
+ SC_R_A72_0,
+ SC_R_A72_1,
+ SC_R_GIC,
+ SC_R_GIC_SMMU,
+ SC_R_CCI
};
-
-
-
+/* resources that have register access for non-secure domain */
+sc_rsrc_t ns_access_allowed[] = {
+ SC_R_GIC,
+ SC_R_GIC_SMMU,
+ SC_R_CCI
+};