diff options
author | Ye Li <ye.li@nxp.com> | 2018-05-15 23:50:21 -0700 |
---|---|---|
committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-11 10:33:03 +0300 |
commit | d5158f18b0b6e13760eb92afeff0a4129f63de4b (patch) | |
tree | 504b7adca7df7f45722028736673d61902a90f0e | |
parent | 6aafe1fcd7296eded1163d919b6ce018487e8645 (diff) |
imx8mm: add HAB support
Similar to imx8mq, the U-boot calls SIP call for HAB interfaces, and trap to ATF
to run the HAB.
Since HAB codes locates in ROM, and need to access OCRAM, CAAM RAM and DDR to
authenticate image. Add these relevant memory region to MMU. Also extend the
stack size of each core to avoid stack overflow, and extend the BL31 limit
to OCRAM end 0x940000.
Signed-off-by: Ye Li <ye.li@nxp.com>
-rw-r--r-- | plat/imx/imx8mm/imx8mm_bl31_setup.c | 11 | ||||
-rw-r--r-- | plat/imx/imx8mm/include/platform_def.h | 4 |
2 files changed, 12 insertions, 3 deletions
diff --git a/plat/imx/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8mm/imx8mm_bl31_setup.c index 310832ff..861d788c 100644 --- a/plat/imx/imx8mm/imx8mm_bl31_setup.c +++ b/plat/imx/imx8mm/imx8mm_bl31_setup.c @@ -173,9 +173,18 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, void bl31_plat_arch_setup(void) { /* add the mmap */ - mmap_add_region(BL31_BASE, BL31_BASE, 0x10000, MT_MEMORY | MT_RW); + mmap_add_region(0x900000, 0x900000, 0x40000, + MT_MEMORY | MT_RW); + mmap_add_region(0x100000, 0x100000, 0x10000, + MT_MEMORY | MT_RW); + mmap_add_region(0x40000000, 0x40000000, 0xc0000000, + MT_MEMORY | MT_RW | MT_NS); + mmap_add_region(BL31_BASE, BL31_BASE, BL31_RO_LIMIT - BL31_RO_BASE, MT_MEMORY | MT_RO); + + mmap_add_region(IMX_ROM_BASE, IMX_ROM_BASE, + 0x40000, MT_MEMORY | MT_RO); /* Map GPV */ mmap_add_region(IMX_GPV_BASE, IMX_GPV_BASE, IMX_GPV_SIZE, MT_DEVICE | MT_RW); /* Map AIPS 1~3 */ diff --git a/plat/imx/imx8mm/include/platform_def.h b/plat/imx/imx8mm/include/platform_def.h index 23ea26e5..49f815e0 100644 --- a/plat/imx/imx8mm/include/platform_def.h +++ b/plat/imx/imx8mm/include/platform_def.h @@ -1,7 +1,7 @@ #define PLATFORM_LINKER_FORMAT "elf64-littleaarch64" #define PLATFORM_LINKER_ARCH aarch64 -#define PLATFORM_STACK_SIZE 0x800 +#define PLATFORM_STACK_SIZE 0xB00 #define CACHE_WRITEBACK_GRANULE 64 #define PLAT_PRIMARY_CPU 0x0 @@ -23,7 +23,7 @@ #define PLAT_STOP_OFF_STATE 3 #define BL31_BASE 0x910000 -#define BL31_LIMIT 0x920000 +#define BL31_LIMIT 0x940000 #define BL32_BASE 0xfe000000 /* non-secure uboot base */ |