summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJeenu Viswambharan <jeenu.viswambharan@arm.com>2017-07-19 13:52:12 +0100
committerJeenu Viswambharan <jeenu.viswambharan@arm.com>2017-07-24 08:26:07 +0100
commitc1232c31ce48c852328a17d317143c44b1ddccfd (patch)
treeb67aeb3e93e9c9d22cb4313606ebe5a5451fba7f
parentaa965e1583349b36ce7edd2b3fe9f1f461ef8b23 (diff)
Fix alphabetic ordering
Commit d832aee90, which added SPE support, got the alphabetical ordering wrong for documentation and Makefile addition. This patch fixes that. Change-Id: I061ecfba4db363902c9d7d577d2ce6c612cb9e1d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
-rw-r--r--Makefile4
-rw-r--r--docs/user-guide.rst10
2 files changed, 7 insertions, 7 deletions
diff --git a/Makefile b/Makefile
index 6aa4e9aa..23ebcaa9 100644
--- a/Makefile
+++ b/Makefile
@@ -438,6 +438,7 @@ $(eval $(call assert_boolean,ENABLE_PLAT_COMPAT))
$(eval $(call assert_boolean,ENABLE_PMF))
$(eval $(call assert_boolean,ENABLE_PSCI_STAT))
$(eval $(call assert_boolean,ENABLE_RUNTIME_INSTRUMENTATION))
+$(eval $(call assert_boolean,ENABLE_SPE_FOR_LOWER_ELS))
$(eval $(call assert_boolean,ERROR_DEPRECATED))
$(eval $(call assert_boolean,GENERATE_COT))
$(eval $(call assert_boolean,HW_ASSISTED_COHERENCY))
@@ -454,7 +455,6 @@ $(eval $(call assert_boolean,TRUSTED_BOARD_BOOT))
$(eval $(call assert_boolean,USE_COHERENT_MEM))
$(eval $(call assert_boolean,USE_TBBR_DEFS))
$(eval $(call assert_boolean,WARMBOOT_ENABLE_DCACHE_EARLY))
-$(eval $(call assert_boolean,ENABLE_SPE_FOR_LOWER_ELS))
$(eval $(call assert_numeric,ARM_ARCH_MAJOR))
$(eval $(call assert_numeric,ARM_ARCH_MINOR))
@@ -477,6 +477,7 @@ $(eval $(call add_define,ENABLE_PLAT_COMPAT))
$(eval $(call add_define,ENABLE_PMF))
$(eval $(call add_define,ENABLE_PSCI_STAT))
$(eval $(call add_define,ENABLE_RUNTIME_INSTRUMENTATION))
+$(eval $(call add_define,ENABLE_SPE_FOR_LOWER_ELS))
$(eval $(call add_define,ERROR_DEPRECATED))
$(eval $(call add_define,HW_ASSISTED_COHERENCY))
$(eval $(call add_define,LOAD_IMAGE_V2))
@@ -494,7 +495,6 @@ $(eval $(call add_define,TRUSTED_BOARD_BOOT))
$(eval $(call add_define,USE_COHERENT_MEM))
$(eval $(call add_define,USE_TBBR_DEFS))
$(eval $(call add_define,WARMBOOT_ENABLE_DCACHE_EARLY))
-$(eval $(call add_define,ENABLE_SPE_FOR_LOWER_ELS))
# Define the EL3_PAYLOAD_BASE flag only if it is provided.
ifdef EL3_PAYLOAD_BASE
diff --git a/docs/user-guide.rst b/docs/user-guide.rst
index 6b82e3d1..ec8c2333 100644
--- a/docs/user-guide.rst
+++ b/docs/user-guide.rst
@@ -337,6 +337,11 @@ Common build options
Currently, only PSCI is instrumented. Enabling this option enables
the ``ENABLE_PMF`` build option as well. Default is 0.
+- ``ENABLE_SPE_FOR_LOWER_ELS`` : Boolean option to enable Statistical Profiling
+ extensions. This is an optional architectural feature available only for
+ AArch64 8.2 onwards. This option defaults to 1 but is automatically
+ disabled when the target architecture is AArch32 or AArch64 8.0/8.1.
+
- ``ENABLE_STACK_PROTECTOR``: String option to enable the stack protection
checks in GCC. Allowed values are "all", "strong" and "0" (default).
"strong" is the recommended stack protection level if this feature is
@@ -563,11 +568,6 @@ Common build options
cluster platforms). If this option is enabled, then warm boot path
enables D-caches immediately after enabling MMU. This option defaults to 0.
-- ``ENABLE_SPE_FOR_LOWER_ELS`` : Boolean option to enable Statistical Profiling
- extensions. This is an optional architectural feature available only for
- AArch64 8.2 onwards. This option defaults to 1 but is automatically
- disabled when the target architecture is AArch32 or AArch64 8.0/8.1.
-
ARM development platform specific build options
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^