MLK-17591-2: CSU/RDC Add testing capability

this patch adds some configuration to test CSU and RDC feature
by default this is disable. to enable it add
$(eval $(call add_define,CSU_RDC_TEST)) to the platform.mk file
under plat/freescale/imx8mq/include

this patch configure
- CSU for GPIO5 to be secure only
- RDC for Cortex A to be Domain ID 0
- GPIO4 to be rw by domain ID 2

to test, stops boot at uboot and run following command:

u-boot=> md 0x3024000
03024000:"Synchronous Abort" handler, esr 0x96000210
ELR:     40257504
LR:      402574c0
x0 : 0000000000000009 x1 : 00000000308600b4
x2 : 00000000fdf28804 x3 : 0000000000000000
x4 : 0000000003024000 x5 : 00000000fdf73ad0
x6 : 0000000000000004 x7 : 000000000000000f
x8 : 00000000fc8ff7e0 x9 : 0000000000000000
x10: 00000000fc8ff049 x11: 0000000000000021
x12: 0000000000000008 x13: 00000000ffffffff
x14: 00000000fc8ffb1c x15: 00000000fc8ffc40
x16: 0000000000000000 x17: 0000000000000000
x18: 00000000fc907da0 x19: 0000000000000040
x20: 0000000000000004 x21: 0000000003024000
x22: 0000000003024000 x23: 00000000fdf7348d
x24: 0000000000000008 x25: 0000000000000009
x26: 0000000000000004 x27: 0000000000000004
x28: 00000000fc8ff928 x29: 00000000fc8ff8a0

Resetting CPU ...

resetting ...

CPU tried to acces GPIO 5 registers and crashes

u-boot=> md 0x30230000
30230000:"Synchronous Abort" handler, esr 0x96000210
ELR:     40257504
LR:      402574c0
x0 : 0000000000000009 x1 : 00000000308600b4
x2 : 00000000fdf28804 x3 : 0000000000000000
x4 : 0000000030230000 x5 : 00000000fdf73ad0
x6 : 0000000000000004 x7 : 000000000000000f
x8 : 00000000fc8ff7e0 x9 : 0000000000000000
x10: 00000000fc8ff049 x11: 0000000000000021
x12: 0000000000000008 x13: 00000000ffffffff
x14: 00000000fc8ffb1c x15: 00000000fc8ffc40
x16: 0000000000000000 x17: 0000000000000000
x18: 00000000fc907da0 x19: 0000000000000040
x20: 0000000000000004 x21: 0000000030230000
x22: 0000000030230000 x23: 00000000fdf7348d
x24: 0000000000000008 x25: 0000000000000009
x26: 0000000000000004 x27: 0000000000000004
x28: 00000000fc8ff928 x29: 00000000fc8ff8a0

Resetting CPU ...

resetting ...

CPU tried to acces GPIO 4 registers and crashes

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

5 files changed, 46 insertions, 2 deletions

diff --git a/plat/imx/imx8mq/imx8m_bl31_setup.c b/plat/imx/imx8mq/imx8m_bl31_setup.c
index be5ae284..28894595 100644
--- a/plat/imx/imx8mq/imx8m_bl31_setup.c
+++ b/plat/imx/imx8mq/imx8m_bl31_setup.c
@@ -150,12 +150,14 @@ void bl31_tzc380_setup(void)
 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 			u_register_t arg2, u_register_t arg3)
 {
-	int i;
 	uint32_t sm_cmd;
+#if !defined (CSU_RDC_TEST)
+	int i;
 	/* enable CSU NS access permission */
 	for (i = 0; i < 64; i++) {
 		mmio_write_32(0x303e0000 + i * 4, 0xffffffff);
 	}
+#endif
 
 	/* Dealloc part 0 and 2 with current DID */
 	sm_cmd = (0 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART);
@@ -247,6 +249,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 	bl33_image_ep_info.args.arg2 = 0x2000000;
 #endif
 	bl31_tzc380_setup();
+
+#if defined (CSU_RDC_TEST)
+	csu_test();
+	rdc_test();
+#endif
 }
 
 void bl31_plat_arch_setup(void)
diff --git a/plat/imx/imx8mq/imx_csu.c b/plat/imx/imx8mq/imx_csu.c
index 3362908d..85c1caf8 100644
--- a/plat/imx/imx8mq/imx_csu.c
+++ b/plat/imx/imx8mq/imx_csu.c
@@ -25,7 +25,12 @@ static struct csu_slave_conf csu_def_csl_conf[] = {
 	{CSU_CSLn_GPIO2, CSU_RW, 0},
 	{CSU_CSLn_GPIO3, CSU_RW, 0},
 	{CSU_CSLn_GPIO4, CSU_RW, 0},
+#if defined (CSU_RDC_TEST)
+	{CSU_CSLn_GPIO5, CSU_SSRW, 0},
+#else
 	{CSU_CSLn_GPIO5, CSU_RW, 0},
+#endif
+	{CSU_CSLn_Reserved1, CSU_RW, 0},
 	{CSU_CSLn_ANA_TSENSOR, CSU_RW, 0},
 	{CSU_CSLn_ANA_OSC, CSU_RW, 0},
 	{CSU_CSLn_WDOG1, CSU_RW, 0},
@@ -275,3 +280,10 @@ void csu_set_default_secure_configs(void)
 {
 	csu_set_sa_configs(sa_def_configs, (uint32_t)ARRAY_SIZE(sa_def_configs));
 }
+
+#if defined (CSU_RDC_TEST)
+void csu_test(void)
+{
+	csu_set_default_slaves_modes();
+}
+#endif
diff --git a/plat/imx/imx8mq/imx_rdc.c b/plat/imx/imx8mq/imx_rdc.c
index 3f1d259e..1929c99b 100644
--- a/plat/imx/imx8mq/imx_rdc.c
+++ b/plat/imx/imx8mq/imx_rdc.c
@@ -142,6 +142,18 @@ int imx_rdc_set_masters(struct rdc_mda_conf *masters_list, uint32_t count)
 	return ret;
 }
 
+#if defined (CSU_RDC_TEST)
+/* Default peripherals settings as an example */
+static struct rdc_pdap_conf periph_config[] = {
+	{RDC_PDAP_GPIO4, 0x30, 0},
+};
+
+
+/* Default masters settings as an example */
+static struct rdc_mda_conf masters_config[] = {
+	{RDC_MDA_A53, 0, 0},
+};
+#else
 /* Default peripherals settings as an example */
 static struct rdc_pdap_conf periph_config[] = {
 	{RDC_PDAP_GPIO1, 0x3, 0},
@@ -156,7 +168,7 @@ static struct rdc_mda_conf masters_config[] = {
 	{RDC_MDA_A53, 0, 0},
 	{RDC_MDA_CAAM, 0, 0},
 };
-
+#endif
 void imx_rdc_set_peripherals_default(void)
 {
 	imx_rdc_set_peripherals(periph_config, ARRAY_SIZE(periph_config));
@@ -166,3 +178,10 @@ void imx_rdc_set_masters_default(void)
 {
 	imx_rdc_set_masters(masters_config, ARRAY_SIZE(masters_config));
 }
+#if defined (CSU_RDC_TEST)
+void rdc_test(void)
+{
+	imx_rdc_set_peripherals_default();
+	imx_rdc_set_masters_default();
+}
+#endif
diff --git a/plat/imx/imx8mq/include/imx_csu.h b/plat/imx/imx8mq/include/imx_csu.h
index c5a198c9..a4ae9abd 100644
--- a/plat/imx/imx8mq/include/imx_csu.h
+++ b/plat/imx/imx8mq/include/imx_csu.h
@@ -211,4 +211,7 @@ void csu_get_sa_index_config(enum csu_sa_idx index, uint8_t *enable,
 void csu_set_sa_configs(struct csu_sa_conf *sa_configs,  uint32_t count);
 void csu_set_default_secure_configs(void);
 
+#if defined (CSU_RDC_TEST)
+void csu_test(void);
+#endif
 #endif /* __IMX_CSU_H__ */
diff --git a/plat/imx/imx8mq/include/imx_rdc.h b/plat/imx/imx8mq/include/imx_rdc.h
index cdc77192..1b7179cc 100644
--- a/plat/imx/imx8mq/include/imx_rdc.h
+++ b/plat/imx/imx8mq/include/imx_rdc.h
@@ -218,4 +218,7 @@ int imx_rdc_set_mda(struct rdc_mda_conf *p);
 int imx_rdc_set_masters(struct rdc_mda_conf *masters_list, uint32_t count);
 void imx_rdc_set_masters_default(void);
 
+#if defined (CSU_RDC_TEST)
+void rdc_test(void);
+#endif
 #endif	/* __IMX_RDC_H__*/