MLK-18502-02 plat: imx8mm: keep L2 cache memory power in WAIT mode

When system enter deepest cpuilde(WAIT mode), the L2 cache memory
can be on for retention to increase the system performance. So
the WAIT mode with cluster power down should be defined as
rentention power state in PSCI. changing the WAIT_OFF_STATE to
WAIT_RET_STATE to make sure the l2 cache memory is not
clean & invalidate.

Signed-off-by: Bai Ping <ping.bai@nxp.com>

3 files changed, 14 insertions, 12 deletions

diff --git a/plat/imx/imx8mm/gpc.c b/plat/imx/imx8mm/gpc.c
index bfa0c5c1..3a1242dd 100644
--- a/plat/imx/imx8mm/gpc.c
+++ b/plat/imx/imx8mm/gpc.c
@@ -159,7 +159,7 @@
 #define COREx_PGC_PCR(core_id)	(0x800 + core_id * 0x40)
 #define COREx_WFI_PDN(core_id)	(1 << (core_id < 2 ? core_id * 2 : (core_id - 2) * 2 + 16))
 #define COREx_IRQ_WUP(core_id)	(core_id < 2 ? (1 << (core_id * 2 + 8)) : (1 << (core_id * 2 + 20)));
-#define LPM_MODE(local_state)	(local_state == PLAT_WAIT_OFF_STATE ? A53_LPM_WAIT : A53_LPM_STOP)
+#define LPM_MODE(local_state)	(local_state == PLAT_WAIT_RET_STATE ? A53_LPM_WAIT : A53_LPM_STOP)
 #define A53_CORE_WUP_SRC(core_id) (1 << (core_id < 2 ? 28 + core_id : 22 + core_id - 2))
 
 #define IMR_MASK_ALL		0xffffffff
@@ -380,7 +380,7 @@ void imx_set_cluster_powerdown(int last_core, uint8_t power_state)
 {
 	uint32_t val;
 
-	if (is_local_state_off(power_state)) {
+	if (!is_local_state_run(power_state)) {
 
 		/* config A53 cluster LPM mode */
 		val = mmio_read_32(IMX_GPC_BASE + LPCR_A53_BSC);
@@ -396,7 +396,13 @@ void imx_set_cluster_powerdown(int last_core, uint8_t power_state)
 		/* enable PLAT/SCU power down */
 		val = mmio_read_32(IMX_GPC_BASE + LPCR_A53_AD);
 		val &= ~EN_L2_WFI_PDN;
-		val |= (L2PGE | EN_PLAT_PDN);
+
+		/* L2 cache memory is on in WAIT mode */
+		if (is_local_state_off(power_state))
+			val |= (L2PGE | EN_PLAT_PDN);
+		else
+			val |= EN_PLAT_PDN;
+
 		mmio_write_32(IMX_GPC_BASE + LPCR_A53_AD, val);
 
 		/* config SLOT for PLAT power up/down */
diff --git a/plat/imx/imx8mm/imx8mm_psci.c b/plat/imx/imx8mm/imx8mm_psci.c
index 6925257a..9c7bec12 100644
--- a/plat/imx/imx8mm/imx8mm_psci.c
+++ b/plat/imx/imx8mm/imx8mm_psci.c
@@ -87,7 +87,7 @@ int imx_validate_power_state(unsigned int power_state,
 
 	if (pwr_type == PSTATE_TYPE_POWERDOWN && state_id == 0x33) {
 		CORE_PWR_STATE(req_state) = PLAT_MAX_OFF_STATE;
-		CLUSTER_PWR_STATE(req_state) = PLAT_WAIT_OFF_STATE;
+		CLUSTER_PWR_STATE(req_state) = PLAT_WAIT_RET_STATE;
 	}
 
 	return PSCI_E_SUCCESS;
@@ -124,10 +124,8 @@ void imx_domain_suspend(const psci_power_state_t *target_state)
 		isb();
 	}
 
-	if (is_local_state_off(CLUSTER_PWR_STATE(target_state))) {
+	if (!is_local_state_run(CLUSTER_PWR_STATE(target_state)))
 		imx_set_cluster_powerdown(core_id, CLUSTER_PWR_STATE(target_state));
-	} else
-		imx_set_cluster_standby(true);
 
 	/* do system level power mode setting */
 	if (is_local_state_retn(SYSTEM_PWR_STATE(target_state))) {
@@ -155,10 +153,8 @@ void imx_domain_suspend_finish(const psci_power_state_t *target_state)
 	}
 
 	/* check the cluster level power status */
-	if (is_local_state_off(CLUSTER_PWR_STATE(target_state))) {
+	if (!is_local_state_run(CLUSTER_PWR_STATE(target_state)))
 		imx_set_cluster_powerdown(core_id, PSCI_LOCAL_STATE_RUN);
-	} else
-		imx_set_cluster_standby(false);
 
 	/* check the core level power status */
 	if (is_local_state_off(CORE_PWR_STATE(target_state))) {
diff --git a/plat/imx/imx8mm/include/platform_def.h b/plat/imx/imx8mm/include/platform_def.h
index e0981af8..eddba6b0 100644
--- a/plat/imx/imx8mm/include/platform_def.h
+++ b/plat/imx/imx8mm/include/platform_def.h
@@ -17,9 +17,9 @@
 #define PWR_DOMAIN_AT_MAX_LVL		1
 #define PLAT_MAX_PWR_LVL		2
 #define PLAT_MAX_OFF_STATE		4
-#define PLAT_MAX_RET_STATE		1
+#define PLAT_MAX_RET_STATE		2
 
-#define PLAT_WAIT_OFF_STATE		2
+#define PLAT_WAIT_RET_STATE		1
 #define PLAT_STOP_OFF_STATE		3
 
 #define BL31_BASE			0x910000