diff options
| author | Bai Ping <ping.bai@nxp.com> | 2018-06-11 13:19:20 +0800 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-11 11:38:54 +0300 |
| commit | 7b9b62cff3816e2196d1d9c94d8c95eedda96dec (patch) | |
| tree | 547261ac97e128160f3fac2f7118dcf0238de4e2 | |
| parent | aaa49f3b45d7cea0790c2856c750d6f9934e2e7d (diff) | |
plat: imx8mm: mask the non-wakeup irq in low power mode
Only enable the wakeup irq when system enter DSM mode.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
| -rw-r--r-- | plat/imx/imx8mm/gpc.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/plat/imx/imx8mm/gpc.c b/plat/imx/imx8mm/gpc.c index 4cccc89a..71dc15f8 100644 --- a/plat/imx/imx8mm/gpc.c +++ b/plat/imx/imx8mm/gpc.c @@ -189,6 +189,7 @@ static struct imx_pwr_domain pu_domains[] = { IMX_PD_DOMAIN(VPU_G2), }; +static uint32_t gpc_wake_irqs[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }; static uint32_t gpc_imr_offset[] = { 0x30, 0x40, 0x1c0, 0x1d0, }; /* save gic dist&redist context when NOC wrapper is power down */ static struct plat_gic_ctx imx_gicv3_ctx; @@ -586,7 +587,7 @@ void imx_set_sys_wakeup(int last_core, bool pdn) /* clear last core's IMR based on GIC's mask setting */ for (int i = 0; i < 4; i++) { if (pdn) - irq_mask = ~dist_ctx->gicd_isenabler[i]; + irq_mask = ~dist_ctx->gicd_isenabler[i] | gpc_wake_irqs[i]; else irq_mask = IMR_MASK_ALL; @@ -595,6 +596,16 @@ void imx_set_sys_wakeup(int last_core, bool pdn) } } +static void imx_gpc_set_wake_irq(uint32_t hwirq, uint32_t on) +{ + uint32_t mask, idx; + + mask = 1 << hwirq % 32; + idx = hwirq / 32; + gpc_wake_irqs[idx] = on ? gpc_wake_irqs[idx] & ~mask : + gpc_wake_irqs[idx] | mask; +} + static void imx_gpc_pm_domain_enable(uint32_t domain_id, uint32_t on) { uint32_t val; @@ -751,6 +762,9 @@ int imx_gpc_handler(uint32_t smc_fid, case FSL_SIP_CONFIG_GPC_PM_DOMAIN: imx_gpc_pm_domain_enable(x2, x3); break; + case FSL_SIP_CONFIG_GPC_SET_WAKE: + imx_gpc_set_wake_irq(x2, x3); + break; default: return SMC_UNK; } |