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authorBai Ping <ping.bai@nxp.com>2018-09-10 17:34:07 +0800
committerBai Ping <ping.bai@nxp.com>2018-09-11 10:00:55 +0800
commit102d081b3f9ac569cdff760ac7c7f7c402c3f5fe (patch)
tree5c8f90332f5d839bc0d67be64dcf426614ae6c27
parent49ff2ef20f2eea76bc48167e0d8fc5f109146058 (diff)
plat: imx8mm: fix the gpumix vpumix power down
the GPU/VPU mix power off is skip in previous code, so correct to make sure GPU/VPU mix is actually power off. Signed-off-by: Bai Ping <ping.bai@nxp.com>
-rw-r--r--plat/imx/imx8mm/gpc.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/plat/imx/imx8mm/gpc.c b/plat/imx/imx8mm/gpc.c
index df1cc266..f35eae38 100644
--- a/plat/imx/imx8mm/gpc.c
+++ b/plat/imx/imx8mm/gpc.c
@@ -820,9 +820,6 @@ static void imx_gpc_pm_domain_enable(uint32_t domain_id, uint32_t on)
/* HSIOMIX has no PU bit, so skip for it */
if (domain_id != HSIOMIX) {
- if (domain_id == GPUMIX || domain_id == VPUMIX)
- return;
-
/* set the PGC bit */
val = mmio_read_32(IMX_GPC_BASE + pwr_domain->pgc_offset);
val |= (1 << 0);