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 <span id="projectnumber">Version 1.1.0</span>
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<div id="projectbrief">Interface Firmware for CoreSight Debug Access Port</div>
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<div class="title">CMSIS-DAP Hardware I/O Pin Access</div> </div>
<div class="ingroups"><a class="el" href="group___d_a_p___config_i_o__gr.html">Configure I/O Ports and Debug Unit</a></div></div><!--header-->
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<p>Standard I/O Pins of the CMSIS-DAP Hardware Debug Port support standard JTAG mode and Serial Wire Debug (SWD) mode.
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga33c16f83b54b07e2a62bb3423341537e"><td class="memItemLeft" align="right" valign="top">static __inline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga33c16f83b54b07e2a62bb3423341537e">PORT_JTAG_SETUP</a> (void)</td></tr>
<tr class="memdesc:ga33c16f83b54b07e2a62bb3423341537e"><td class="mdescLeft"> </td><td class="mdescRight">Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET. <a href="#ga33c16f83b54b07e2a62bb3423341537e"></a><br/></td></tr>
<tr class="separator:ga33c16f83b54b07e2a62bb3423341537e"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gab8876acfd193c31fbe5246ca6ba9249e"><td class="memItemLeft" align="right" valign="top">static __inline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gab8876acfd193c31fbe5246ca6ba9249e">PORT_SWD_SETUP</a> (void)</td></tr>
<tr class="memdesc:gab8876acfd193c31fbe5246ca6ba9249e"><td class="mdescLeft"> </td><td class="mdescRight">Setup SWD I/O pins: SWCLK, SWDIO, and nRESET. <a href="#gab8876acfd193c31fbe5246ca6ba9249e"></a><br/></td></tr>
<tr class="separator:gab8876acfd193c31fbe5246ca6ba9249e"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga6522dd62895ffbb299294ec0b7c1b316"><td class="memItemLeft" align="right" valign="top">static __inline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga6522dd62895ffbb299294ec0b7c1b316">PORT_OFF</a> (void)</td></tr>
<tr class="memdesc:ga6522dd62895ffbb299294ec0b7c1b316"><td class="mdescLeft"> </td><td class="mdescRight">Disable JTAG/SWD I/O Pins. <a href="#ga6522dd62895ffbb299294ec0b7c1b316"></a><br/></td></tr>
<tr class="separator:ga6522dd62895ffbb299294ec0b7c1b316"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaac4a182db3a1f3a3de04280dccb8d9d3"><td class="memItemLeft" align="right" valign="top">static __forceinline uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gaac4a182db3a1f3a3de04280dccb8d9d3">PIN_SWCLK_TCK_IN</a> (void)</td></tr>
<tr class="memdesc:gaac4a182db3a1f3a3de04280dccb8d9d3"><td class="mdescLeft"> </td><td class="mdescRight">SWCLK/TCK I/O pin: Get Input. <a href="#gaac4a182db3a1f3a3de04280dccb8d9d3"></a><br/></td></tr>
<tr class="separator:gaac4a182db3a1f3a3de04280dccb8d9d3"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga197ad2824c91a8ea9ad0132951125217"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga197ad2824c91a8ea9ad0132951125217">PIN_SWCLK_TCK_SET</a> (void)</td></tr>
<tr class="memdesc:ga197ad2824c91a8ea9ad0132951125217"><td class="mdescLeft"> </td><td class="mdescRight">SWCLK/TCK I/O pin: Set Output to High. <a href="#ga197ad2824c91a8ea9ad0132951125217"></a><br/></td></tr>
<tr class="separator:ga197ad2824c91a8ea9ad0132951125217"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gac95e157f51e8073cf740761bf59f09f3"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gac95e157f51e8073cf740761bf59f09f3">PIN_SWCLK_TCK_CLR</a> (void)</td></tr>
<tr class="memdesc:gac95e157f51e8073cf740761bf59f09f3"><td class="mdescLeft"> </td><td class="mdescRight">SWCLK/TCK I/O pin: Set Output to Low. <a href="#gac95e157f51e8073cf740761bf59f09f3"></a><br/></td></tr>
<tr class="separator:gac95e157f51e8073cf740761bf59f09f3"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaef0a34cb4eb3882c7ae05b9e1b0b7574"><td class="memItemLeft" align="right" valign="top">static __forceinline uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gaef0a34cb4eb3882c7ae05b9e1b0b7574">PIN_SWDIO_TMS_IN</a> (void)</td></tr>
<tr class="memdesc:gaef0a34cb4eb3882c7ae05b9e1b0b7574"><td class="mdescLeft"> </td><td class="mdescRight">SWDIO/TMS I/O pin: Get Input. <a href="#gaef0a34cb4eb3882c7ae05b9e1b0b7574"></a><br/></td></tr>
<tr class="separator:gaef0a34cb4eb3882c7ae05b9e1b0b7574"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaad5e63cde6ce0b523d66ab4e05f974e7"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gaad5e63cde6ce0b523d66ab4e05f974e7">PIN_SWDIO_TMS_SET</a> (void)</td></tr>
<tr class="memdesc:gaad5e63cde6ce0b523d66ab4e05f974e7"><td class="mdescLeft"> </td><td class="mdescRight">SWDIO/TMS I/O pin: Set Output to High. <a href="#gaad5e63cde6ce0b523d66ab4e05f974e7"></a><br/></td></tr>
<tr class="separator:gaad5e63cde6ce0b523d66ab4e05f974e7"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gab29c2d8f97388bb6ba336bab41b0ca53"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gab29c2d8f97388bb6ba336bab41b0ca53">PIN_SWDIO_TMS_CLR</a> (void)</td></tr>
<tr class="memdesc:gab29c2d8f97388bb6ba336bab41b0ca53"><td class="mdescLeft"> </td><td class="mdescRight">SWDIO/TMS I/O pin: Set Output to Low. <a href="#gab29c2d8f97388bb6ba336bab41b0ca53"></a><br/></td></tr>
<tr class="separator:gab29c2d8f97388bb6ba336bab41b0ca53"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga545a6a01ae522683c32e830683511c17"><td class="memItemLeft" align="right" valign="top">static __forceinline uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga545a6a01ae522683c32e830683511c17">PIN_SWDIO_IN</a> (void)</td></tr>
<tr class="memdesc:ga545a6a01ae522683c32e830683511c17"><td class="mdescLeft"> </td><td class="mdescRight">SWDIO I/O pin: Get Input (used in SWD mode only). <a href="#ga545a6a01ae522683c32e830683511c17"></a><br/></td></tr>
<tr class="separator:ga545a6a01ae522683c32e830683511c17"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga5e163176ee6bc9925f8f702d27d08f96"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga5e163176ee6bc9925f8f702d27d08f96">PIN_SWDIO_OUT</a> (uint32_t bit)</td></tr>
<tr class="memdesc:ga5e163176ee6bc9925f8f702d27d08f96"><td class="mdescLeft"> </td><td class="mdescRight">SWDIO I/O pin: Set Output (used in SWD mode only). <a href="#ga5e163176ee6bc9925f8f702d27d08f96"></a><br/></td></tr>
<tr class="separator:ga5e163176ee6bc9925f8f702d27d08f96"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga3fd30f1eb2feb4bb52d3c7e8c373d4d9"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga3fd30f1eb2feb4bb52d3c7e8c373d4d9">PIN_SWDIO_OUT_ENABLE</a> (void)</td></tr>
<tr class="memdesc:ga3fd30f1eb2feb4bb52d3c7e8c373d4d9"><td class="mdescLeft"> </td><td class="mdescRight">SWDIO I/O pin: Switch to Output mode (used in SWD mode only). <a href="#ga3fd30f1eb2feb4bb52d3c7e8c373d4d9"></a><br/></td></tr>
<tr class="separator:ga3fd30f1eb2feb4bb52d3c7e8c373d4d9"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga1fb4b84b48b39bcc28790cb45abb0c59"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga1fb4b84b48b39bcc28790cb45abb0c59">PIN_SWDIO_OUT_DISABLE</a> (void)</td></tr>
<tr class="memdesc:ga1fb4b84b48b39bcc28790cb45abb0c59"><td class="mdescLeft"> </td><td class="mdescRight">SWDIO I/O pin: Switch to Input mode (used in SWD mode only). <a href="#ga1fb4b84b48b39bcc28790cb45abb0c59"></a><br/></td></tr>
<tr class="separator:ga1fb4b84b48b39bcc28790cb45abb0c59"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaffb848049cb9da42e55731aa40c35429"><td class="memItemLeft" align="right" valign="top">static __forceinline uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gaffb848049cb9da42e55731aa40c35429">PIN_TDI_IN</a> (void)</td></tr>
<tr class="memdesc:gaffb848049cb9da42e55731aa40c35429"><td class="mdescLeft"> </td><td class="mdescRight">TDI I/O pin: Get Input. <a href="#gaffb848049cb9da42e55731aa40c35429"></a><br/></td></tr>
<tr class="separator:gaffb848049cb9da42e55731aa40c35429"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga57bf14c857b0c2d0227f2fd2a588c03b"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga57bf14c857b0c2d0227f2fd2a588c03b">PIN_TDI_OUT</a> (uint32_t bit)</td></tr>
<tr class="memdesc:ga57bf14c857b0c2d0227f2fd2a588c03b"><td class="mdescLeft"> </td><td class="mdescRight">TDI I/O pin: Set Output. <a href="#ga57bf14c857b0c2d0227f2fd2a588c03b"></a><br/></td></tr>
<tr class="separator:ga57bf14c857b0c2d0227f2fd2a588c03b"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga8f34a3b7d1c1ecdf7dbc0c527e16c0e5"><td class="memItemLeft" align="right" valign="top">static __forceinline uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga8f34a3b7d1c1ecdf7dbc0c527e16c0e5">PIN_TDO_IN</a> (void)</td></tr>
<tr class="memdesc:ga8f34a3b7d1c1ecdf7dbc0c527e16c0e5"><td class="mdescLeft"> </td><td class="mdescRight">TDO I/O pin: Get Input. <a href="#ga8f34a3b7d1c1ecdf7dbc0c527e16c0e5"></a><br/></td></tr>
<tr class="separator:ga8f34a3b7d1c1ecdf7dbc0c527e16c0e5"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaa3849d1a7cc9945c05578bc4616f3e63"><td class="memItemLeft" align="right" valign="top">static __forceinline uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gaa3849d1a7cc9945c05578bc4616f3e63">PIN_nTRST_IN</a> (void)</td></tr>
<tr class="memdesc:gaa3849d1a7cc9945c05578bc4616f3e63"><td class="mdescLeft"> </td><td class="mdescRight">nTRST I/O pin: Get Input. <a href="#gaa3849d1a7cc9945c05578bc4616f3e63"></a><br/></td></tr>
<tr class="separator:gaa3849d1a7cc9945c05578bc4616f3e63"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga4eebf6aa9628de5176632db0458cd234"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga4eebf6aa9628de5176632db0458cd234">PIN_nTRST_OUT</a> (uint32_t bit)</td></tr>
<tr class="memdesc:ga4eebf6aa9628de5176632db0458cd234"><td class="mdescLeft"> </td><td class="mdescRight">nTRST I/O pin: Set Output. <a href="#ga4eebf6aa9628de5176632db0458cd234"></a><br/></td></tr>
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<tr class="memitem:gad0de1a17d02af9a9959e4031d58b1eca"><td class="memItemLeft" align="right" valign="top">static __forceinline uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#gad0de1a17d02af9a9959e4031d58b1eca">PIN_nRESET_IN</a> (void)</td></tr>
<tr class="memdesc:gad0de1a17d02af9a9959e4031d58b1eca"><td class="mdescLeft"> </td><td class="mdescRight">nRESET I/O pin: Get Input. <a href="#gad0de1a17d02af9a9959e4031d58b1eca"></a><br/></td></tr>
<tr class="separator:gad0de1a17d02af9a9959e4031d58b1eca"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga6764592e610237a3e325ebaecba83760"><td class="memItemLeft" align="right" valign="top">static __forceinline void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga6764592e610237a3e325ebaecba83760">PIN_nRESET_OUT</a> (uint32_t bit)</td></tr>
<tr class="memdesc:ga6764592e610237a3e325ebaecba83760"><td class="mdescLeft"> </td><td class="mdescRight">nRESET I/O pin: Set Output. <a href="#ga6764592e610237a3e325ebaecba83760"></a><br/></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<p>Standard I/O Pins of the CMSIS-DAP Hardware Debug Port support standard JTAG mode and Serial Wire Debug (SWD) mode. </p>
<p>In SWD mode only 2 pins are required to implement the debug interface of a device. The following I/O Pins are provided:</p>
<table class="doxtable">
<tr>
<th>JTAG I/O Pin </th><th>SWD I/O Pin </th><th>CMSIS-DAP Hardware pin mode</th></tr>
<tr>
<td>TCK: Test Clock </td><td>SWCLK: Clock </td><td>Output Push/Pull </td></tr>
<tr>
<td>TMS: Test Mode Select </td><td>SWDIO: Data I/O </td><td>Output Push/Pull; Input (for receiving data) </td></tr>
<tr>
<td>TDI: Test Data Input </td><td></td><td>Output Push/Pull </td></tr>
<tr>
<td>TDO: Test Data Output </td><td></td><td>Input </td></tr>
<tr>
<td>nTRST: Test Reset (optional) </td><td></td><td>Output Open Drain with pull-up resistor </td></tr>
<tr>
<td>nRESET: Device Reset </td><td>nRESET: Device Reset </td><td>Output Open Drain with pull-up resistor </td></tr>
</table>
<h2>DAP Hardware I/O Pin Access Functions</h2>
<p>The various I/O Pins are accessed by functions that implement the Read, Write, Set, or Clear to these I/O Pins.</p>
<p>For the SWDIO I/O Pin there are additional functions that are called in SWD I/O mode only. This functions are provided to achieve faster I/O that is possible with some advanced GPIO peripherals that can independently write/read a single I/O pin without affecting any other pins of the same I/O port. The following SWDIO I/O Pin functions are provided:</p>
<ul>
<li><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga3fd30f1eb2feb4bb52d3c7e8c373d4d9">PIN_SWDIO_OUT_ENABLE</a> to enable the output mode from the DAP hardware.</li>
<li><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga1fb4b84b48b39bcc28790cb45abb0c59">PIN_SWDIO_OUT_DISABLE</a> to enable the input mode to the DAP hardware.</li>
<li><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga545a6a01ae522683c32e830683511c17">PIN_SWDIO_IN</a> to read from the SWDIO I/O pin with utmost possible speed.</li>
<li><a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga5e163176ee6bc9925f8f702d27d08f96">PIN_SWDIO_OUT</a> to write to the SWDIO I/O pin with utmost possible speed. </li>
</ul>
<h2 class="groupheader">Function Documentation</h2>
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<td class="memname">static __forceinline uint32_t PIN_nRESET_IN </td>
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<p>nRESET I/O pin: Get Input. </p>
<dl class="section return"><dt>Returns</dt><dd>Current status of the nRESET DAP hardware I/O pin. </dd></dl>
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<td class="memname">static __forceinline void PIN_nRESET_OUT </td>
<td>(</td>
<td class="paramtype">uint32_t </td>
<td class="paramname"><em>bit</em></td><td>)</td>
<td></td>
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<p>nRESET I/O pin: Set Output. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">bit</td><td>target device hardware reset pin status:<ul>
<li>0: issue a device hardware reset.</li>
<li>1: release device hardware reset. </li>
</ul>
</td></tr>
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</dd>
</dl>
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<td class="memname">static __forceinline uint32_t PIN_nTRST_IN </td>
<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
<td></td>
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<p>nTRST I/O pin: Get Input. </p>
<dl class="section return"><dt>Returns</dt><dd>Current status of the nTRST DAP hardware I/O pin. </dd></dl>
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<td class="memname">static __forceinline void PIN_nTRST_OUT </td>
<td>(</td>
<td class="paramtype">uint32_t </td>
<td class="paramname"><em>bit</em></td><td>)</td>
<td></td>
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<p>nTRST I/O pin: Set Output. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">bit</td><td>JTAG TRST Test Reset pin status:<ul>
<li>0: issue a JTAG TRST Test Reset.</li>
<li>1: release JTAG TRST Test Reset. </li>
</ul>
</td></tr>
</table>
</dd>
</dl>
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<td class="memname">static __forceinline void PIN_SWCLK_TCK_CLR </td>
<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
<td></td>
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<p>SWCLK/TCK I/O pin: Set Output to Low. </p>
<p>Set the SWCLK/TCK DAP hardware I/O pin to low level. </p>
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<td class="memname">static __forceinline uint32_t PIN_SWCLK_TCK_IN </td>
<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<p>SWCLK/TCK I/O pin: Get Input. </p>
<dl class="section return"><dt>Returns</dt><dd>Current status of the SWCLK/TCK DAP hardware I/O pin. </dd></dl>
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<td class="memname">static __forceinline void PIN_SWCLK_TCK_SET </td>
<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
<td></td>
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<p>SWCLK/TCK I/O pin: Set Output to High. </p>
<p>Set the SWCLK/TCK DAP hardware I/O pin to high level. </p>
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<td class="memname">static __forceinline uint32_t PIN_SWDIO_IN </td>
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<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<p>SWDIO I/O pin: Get Input (used in SWD mode only). </p>
<dl class="section return"><dt>Returns</dt><dd>Current status of the SWDIO DAP hardware I/O pin. </dd></dl>
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<td class="memname">static __forceinline void PIN_SWDIO_OUT </td>
<td>(</td>
<td class="paramtype">uint32_t </td>
<td class="paramname"><em>bit</em></td><td>)</td>
<td></td>
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<p>SWDIO I/O pin: Set Output (used in SWD mode only). </p>
<dl class="params"><dt>Parameters</dt><dd>
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<tr><td class="paramname">bit</td><td>Output value for the SWDIO DAP hardware I/O pin. </td></tr>
</table>
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<td class="memname">static __forceinline void PIN_SWDIO_OUT_DISABLE </td>
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<p>SWDIO I/O pin: Switch to Input mode (used in SWD mode only). </p>
<p>Configure the SWDIO DAP hardware I/O pin to input mode. This function is called prior <a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga545a6a01ae522683c32e830683511c17">PIN_SWDIO_IN</a> function calls. </p>
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<td class="memname">static __forceinline void PIN_SWDIO_OUT_ENABLE </td>
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<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<p>SWDIO I/O pin: Switch to Output mode (used in SWD mode only). </p>
<p>Configure the SWDIO DAP hardware I/O pin to output mode. This function is called prior <a class="el" href="group___d_a_p___config___port_i_o__gr.html#ga5e163176ee6bc9925f8f702d27d08f96">PIN_SWDIO_OUT</a> function calls. </p>
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<td class="memname">static __forceinline void PIN_SWDIO_TMS_CLR </td>
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<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<p>SWDIO/TMS I/O pin: Set Output to Low. </p>
<p>Set the SWDIO/TMS DAP hardware I/O pin to low level. </p>
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<td class="memname">static __forceinline uint32_t PIN_SWDIO_TMS_IN </td>
<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<p>SWDIO/TMS I/O pin: Get Input. </p>
<dl class="section return"><dt>Returns</dt><dd>Current status of the SWDIO/TMS DAP hardware I/O pin. </dd></dl>
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<td class="memname">static __forceinline void PIN_SWDIO_TMS_SET </td>
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<td class="paramname"></td><td>)</td>
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<p>SWDIO/TMS I/O pin: Set Output to High. </p>
<p>Set the SWDIO/TMS DAP hardware I/O pin to high level. </p>
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<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<p>TDI I/O pin: Get Input. </p>
<dl class="section return"><dt>Returns</dt><dd>Current status of the TDI DAP hardware I/O pin. </dd></dl>
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<td>(</td>
<td class="paramtype">uint32_t </td>
<td class="paramname"><em>bit</em></td><td>)</td>
<td></td>
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<p>TDI I/O pin: Set Output. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">bit</td><td>Output value for the TDI DAP hardware I/O pin. </td></tr>
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<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<p>TDO I/O pin: Get Input. </p>
<dl class="section return"><dt>Returns</dt><dd>Current status of the TDO DAP hardware I/O pin. </dd></dl>
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<td class="memname">static __inline void PORT_JTAG_SETUP </td>
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<p>Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET. </p>
<p>Configures the DAP Hardware I/O pins for JTAG mode:</p>
<ul>
<li>TCK, TMS, TDI, nTRST, nRESET to output mode and set to high level.</li>
<li>TDO to input mode. </li>
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<td class="memname">static __inline void PORT_OFF </td>
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<p>Disable JTAG/SWD I/O Pins. </p>
<p>Disables the DAP Hardware I/O pins which configures:</p>
<ul>
<li>TCK/SWCLK, TMS/SWDIO, TDI, TDO, nTRST, nRESET to High-Z mode. </li>
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<td class="memname">static __inline void PORT_SWD_SETUP </td>
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<p>Setup SWD I/O pins: SWCLK, SWDIO, and nRESET. </p>
<p>Configures the DAP Hardware I/O pins for Serial Wire Debug (SWD) mode:</p>
<ul>
<li>SWCLK, SWDIO, nRESET to output mode and set to default high level.</li>
<li>TDI, nTRST to HighZ mode (pins are unused in SWD mode). </li>
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