/* ** ################################################################### ** Processors: MK20DN512VLK10 ** MK20DN512VLL10 ** MK20DN512VLQ10 ** MK20DN512VMC10 ** MK20DN512VMD10 ** MK20DX128VLQ10 ** MK20DX128VMD10 ** MK20DX256VLK10 ** MK20DX256VLL10 ** MK20DX256VLQ10 ** MK20DX256VMC10 ** MK20DX256VMD10 ** ** Compilers: Keil ARM C/C++ Compiler ** Freescale C/C++ for Embedded ARM ** GNU C Compiler ** IAR ANSI C/C++ Compiler for ARM ** ** Reference manual: K20P144M100SF2V2RM Rev. 2, Jun 2012 ** Version: rev. 1.9, 2015-07-29 ** Build: b151217 ** ** Abstract: ** Provides a system configuration function and a global variable that ** contains the system frequency. It configures the device and initializes ** the oscillator (PLL) that is part of the microcontroller device. ** ** Copyright (c) 2015 Freescale Semiconductor, Inc. ** All rights reserved. ** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** ** o Redistributions of source code must retain the above copyright notice, this list ** of conditions and the following disclaimer. ** ** o Redistributions in binary form must reproduce the above copyright notice, this ** list of conditions and the following disclaimer in the documentation and/or ** other materials provided with the distribution. ** ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its ** contributors may be used to endorse or promote products derived from this ** software without specific prior written permission. ** ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ** ** http: www.freescale.com ** mail: support@freescale.com ** ** Revisions: ** - rev. 1.0 (2012-01-03) ** Initial version ** - rev. 1.1 (2012-04-13) ** Added new #define symbol MCU_MEM_MAP_VERSION_MINOR. ** Added new #define symbols _BASE_PTRS. ** - rev. 1.2 (2012-07-09) ** UART0 - Fixed register definition - CEA709.1-B (LON) registers added. ** - rev. 1.3 (2012-10-29) ** Registers updated according to the new reference manual revision - Rev. 2, Jun 2012 ** - rev. 1.4 (2013-04-05) ** Changed start of doxygen comment. ** - rev. 1.5 (2013-06-24) ** NV_FOPT register - NMI_DIS bit added. ** SPI - PCSIS bit group in MCR register updated. ** - rev. 1.6 (2014-07-23) ** Delay of 1 ms added to SystemInit() to ensure stable FLL output in FEI and FEE MCG modes. ** Predefined SystemInit() implementation updated: ** - External clock sources available on TWR board used. ** - Added 1 ms waiting loop after entering FLL engaged MCG mode. ** - rev. 1.7 (2014-08-28) ** Update of startup files - possibility to override DefaultISR added. ** - rev. 1.8 (2014-10-14) ** Renamed interrupt vector Watchdog to WDOG_EWM and LPTimer to LPTMR0 ** - rev. 1.9 (2015-07-29) ** Correction of backward compatibility. ** ** ################################################################### */ /*! * @file MK20D10 * @version 1.9 * @date 2015-07-29 * @brief Device specific configuration file for MK20D10 (header file) * * Provides a system configuration function and a global variable that contains * the system frequency. It configures the device and initializes the oscillator * (PLL) that is part of the microcontroller device. */ #ifndef _SYSTEM_MK20D10_H_ #define _SYSTEM_MK20D10_H_ /**< Symbol preventing repeated inclusion */ #ifdef __cplusplus extern "C" { #endif #include #ifndef DISABLE_WDOG #define DISABLE_WDOG 1 #endif /* Define clock source values */ #define CPU_XTAL_CLK_HZ 8000000U /* Value of the external crystal or oscillator clock frequency of the system oscillator (OSC) in Hz */ #define CPU_XTAL32k_CLK_HZ 32768U /* Value of the external 32k crystal or oscillator clock frequency of the RTC in Hz */ #define CPU_INT_SLOW_CLK_HZ 32768U /* Value of the slow internal oscillator clock frequency in Hz */ #define CPU_INT_FAST_CLK_HZ 4000000U /* Value of the fast internal oscillator clock frequency in Hz */ /* Low power mode enable */ /* SMC_PMPROT: AVLP=1,ALLS=1,AVLLS=1 */ #define SYSTEM_SMC_PMPROT_VALUE 0x2AU /* SMC_PMPROT */ #define DEFAULT_SYSTEM_CLOCK 20971520U /* Default System clock value */ /** * @brief System clock frequency (core clock) * * The system clock frequency supplied to the SysTick timer and the processor * core clock. This variable can be used by the user application to setup the * SysTick timer or configure other parameters. It may also be used by debugger to * query the frequency of the debug timer or configure the trace clock speed * SystemCoreClock is initialized with a correct predefined value. */ extern uint32_t SystemCoreClock; /** * @brief Setup the microcontroller system. * * Typically this function configures the oscillator (PLL) that is part of the * microcontroller device. For systems with variable clock speed it also updates * the variable SystemCoreClock. SystemInit is called from startup_device file. */ void SystemInit (void); /** * @brief Updates the SystemCoreClock variable. * * It must be called whenever the core clock is changed during program * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates * the current core clock. */ void SystemCoreClockUpdate (void); #ifdef __cplusplus } #endif #endif /* _SYSTEM_MK20D10_H_ */