From 66efdcd187473fe461642caf0675dae666c83027 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Thu, 9 Feb 2017 14:24:14 -0800 Subject: add defines for Colibri standard SPI The Colibri standard SPI is connected to the SoCs ECSPI3 instance. Add defines as BOARD_ECSPI_... Also add board level pinmux and clock readout support. Signed-off-by: Stefan Agner --- examples/imx7_colibri_m4/board.h | 9 +++++++++ examples/imx7_colibri_m4/clock_freq.c | 4 ++++ examples/imx7_colibri_m4/pin_mux.c | 30 ++++++++++++++++++++++++++++++ examples/imx7_colibri_m4/pin_mux.h | 12 ++++++++++++ 4 files changed, 55 insertions(+) diff --git a/examples/imx7_colibri_m4/board.h b/examples/imx7_colibri_m4/board.h index b2d188b..d2c7e25 100644 --- a/examples/imx7_colibri_m4/board.h +++ b/examples/imx7_colibri_m4/board.h @@ -89,6 +89,15 @@ #define BOARD_GPIO_KEY_IRQ_NUM GPIO2_INT31_16_IRQn #define BOARD_GPIO_KEY_HANDLER GPIO2_INT31_16_Handler +/* Colibri SPI is ECSPI3 */ +#define BOARD_ECSPI_RDC_PDAP rdcPdapEcspi3 +#define BOARD_ECSPI_CCM_ROOT ccmRootEcspi3 +#define BOARD_ECSPI_CCM_CCGR ccmCcgrGateEcspi3 +#define BOARD_ECSPI_BASEADDR ECSPI3 +#define BOARD_ECSPI_CHANNEL ecspiSelectChannel0 +#define BOARD_ECSPI_IRQ_NUM eCSPI3_IRQn +#define BOARD_ECSPI_HANDLER eCSPI3_Handler + /* Debug UART information for this board */ #define BOARD_DEBUG_UART_RDC_PDAP rdcPdapUart2 #define BOARD_DEBUG_UART_CCM_ROOT ccmRootUart2 diff --git a/examples/imx7_colibri_m4/clock_freq.c b/examples/imx7_colibri_m4/clock_freq.c index 3c5715b..a60b4ce 100644 --- a/examples/imx7_colibri_m4/clock_freq.c +++ b/examples/imx7_colibri_m4/clock_freq.c @@ -95,6 +95,10 @@ uint32_t get_ecspi_clock_freq(ECSPI_Type* base) root = CCM_GetRootMux(CCM, ccmRootEcspi2); CCM_GetRootDivider(CCM, ccmRootEcspi2, &pre, &post); break; + case ECSPI3_BASE: + root = CCM_GetRootMux(CCM, ccmRootEcspi3); + CCM_GetRootDivider(CCM, ccmRootEcspi3, &pre, &post); + break; default: return 0; } diff --git a/examples/imx7_colibri_m4/pin_mux.c b/examples/imx7_colibri_m4/pin_mux.c index 6c8cc0e..3c2b733 100644 --- a/examples/imx7_colibri_m4/pin_mux.c +++ b/examples/imx7_colibri_m4/pin_mux.c @@ -192,6 +192,36 @@ void configure_uart_pins(UART_Type* base) } } +void configure_ecspi_pins(ECSPI_Type* base) +{ + // ECSPI1 iomux configuration + /* daisy chain selection */ + IOMUXC_ECSPI3_MISO_SELECT_INPUT = 0; //(I2C1_SCL SODIM 90) + IOMUXC_ECSPI3_MOSI_SELECT_INPUT = 0; //(I2C1_SCL SODIM 90) + + /* iomux */ + IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_MUX_MODE(3); /* ECSPI SLK */ + IOMUXC_SW_MUX_CTL_PAD_I2C1_SDA = IOMUXC_SW_MUX_CTL_PAD_I2C1_SDA_MUX_MODE(3); /* ECSPI MOSI */ + IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL_MUX_MODE(3); /* ECSPI MISO */ + IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA = IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA_MUX_MODE(3); /* ECSPI SS0 */ + + /* pad control */ + IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL = IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_PE_MASK | + IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_PS(0) | /* pull down */ + IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_DSE(0) | + IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_HYS_MASK; + + IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA = IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_DSE(0) | + IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_HYS_MASK; + + IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL = IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL_HYS_MASK; + + IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA = IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_PE_MASK | + IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_PS(3) | /* pull up */ + IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_DSE(0) | + IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_HYS_MASK; +} + /******************************************************************************* * EOF ******************************************************************************/ diff --git a/examples/imx7_colibri_m4/pin_mux.h b/examples/imx7_colibri_m4/pin_mux.h index adb5cc7..8ca7a7c 100644 --- a/examples/imx7_colibri_m4/pin_mux.h +++ b/examples/imx7_colibri_m4/pin_mux.h @@ -88,6 +88,18 @@ void configure_i2c_pins(I2C_Type* base); /* ===================================================================*/ void configure_uart_pins(UART_Type* base); +/*! +** @brief +** ECSPI method sets registers according routing settings. Call +** this method code to route desired pins into: +** ECSPI1, ECSPI2, ECSPI3, ECSPI4 +** peripherals. +** @param +** ECSPI_Type* base - ECSPI base address 1..4 +*/ +void configure_ecspi_pins(ECSPI_Type* base); + + #endif /* __PIN_MUX_H__ */ /******************************************************************************* * EOF -- cgit v1.2.3