From 3fd18eead7b265bd0f72630473b08354c5a1a4e3 Mon Sep 17 00:00:00 2001 From: Bhuvanchandra DV Date: Thu, 6 Apr 2017 11:32:12 +0530 Subject: vf6xx: Avoid multiple symbol defined spurious compile time errors When not using --allow-multiple-definition (-z muldefs) in LD flags build fails with symbol multiply defined error. Signed-off-by: Bhuvanchandra DV Signed-off-by: Stefan Agner --- examples/vf6xx_colibri_m4/pin_mux.c | 138 ++++++++++++++++++++++++++++++++++++ examples/vf6xx_colibri_m4/pin_mux.h | 138 +----------------------------------- platform/drivers/inc/ccm_vf6xx.h | 16 +---- platform/drivers/src/ccm_vf6xx.c | 15 ++++ 4 files changed, 156 insertions(+), 151 deletions(-) diff --git a/examples/vf6xx_colibri_m4/pin_mux.c b/examples/vf6xx_colibri_m4/pin_mux.c index df9a28e..fa7ec04 100644 --- a/examples/vf6xx_colibri_m4/pin_mux.c +++ b/examples/vf6xx_colibri_m4/pin_mux.c @@ -39,6 +39,144 @@ #include "device_imx.h" #include "pin_mux.h" +const uint32_t iomux_gpio_pad_addr[] = { + (uint32_t)(&IOMUXC_PTA6), + (uint32_t)(&IOMUXC_PTA8), + (uint32_t)(&IOMUXC_PTA9), + (uint32_t)(&IOMUXC_PTA10), + (uint32_t)(&IOMUXC_PTA11), + (uint32_t)(&IOMUXC_PTA12), + (uint32_t)(&IOMUXC_PTA16), + (uint32_t)(&IOMUXC_PTA17), + (uint32_t)(&IOMUXC_PTA18), + (uint32_t)(&IOMUXC_PTA19), + (uint32_t)(&IOMUXC_PTA20), + (uint32_t)(&IOMUXC_PTA21), + (uint32_t)(&IOMUXC_PTA22), + (uint32_t)(&IOMUXC_PTA23), + (uint32_t)(&IOMUXC_PTA24), + (uint32_t)(&IOMUXC_PTA25), + (uint32_t)(&IOMUXC_PTA26), + (uint32_t)(&IOMUXC_PTA27), + (uint32_t)(&IOMUXC_PTA28), + (uint32_t)(&IOMUXC_PTA29), + (uint32_t)(&IOMUXC_PTA30), + (uint32_t)(&IOMUXC_PTA31), + (uint32_t)(&IOMUXC_PTB0), + (uint32_t)(&IOMUXC_PTB1), + (uint32_t)(&IOMUXC_PTB2), + (uint32_t)(&IOMUXC_PTB3), + (uint32_t)(&IOMUXC_PTB4), + (uint32_t)(&IOMUXC_PTB5), + (uint32_t)(&IOMUXC_PTB6), + (uint32_t)(&IOMUXC_PTB7), + (uint32_t)(&IOMUXC_PTB8), + (uint32_t)(&IOMUXC_PTB9), + (uint32_t)(&IOMUXC_PTB10), + (uint32_t)(&IOMUXC_PTB11), + (uint32_t)(&IOMUXC_PTB12), + (uint32_t)(&IOMUXC_PTB13), + (uint32_t)(&IOMUXC_PTB14), + (uint32_t)(&IOMUXC_PTB15), + (uint32_t)(&IOMUXC_PTB16), + (uint32_t)(&IOMUXC_PTB17), + (uint32_t)(&IOMUXC_PTB18), + (uint32_t)(&IOMUXC_PTB19), + (uint32_t)(&IOMUXC_PTB20), + (uint32_t)(&IOMUXC_PTB21), + (uint32_t)(&IOMUXC_PTB22), + (uint32_t)(&IOMUXC_PTC0), + (uint32_t)(&IOMUXC_PTC1), + (uint32_t)(&IOMUXC_PTC2), + (uint32_t)(&IOMUXC_PTC3), + (uint32_t)(&IOMUXC_PTC4), + (uint32_t)(&IOMUXC_PTC5), + (uint32_t)(&IOMUXC_PTC6), + (uint32_t)(&IOMUXC_PTC7), + (uint32_t)(&IOMUXC_PTC8), + (uint32_t)(&IOMUXC_PTC9), + (uint32_t)(&IOMUXC_PTC10), + (uint32_t)(&IOMUXC_PTC11), + (uint32_t)(&IOMUXC_PTC12), + (uint32_t)(&IOMUXC_PTC13), + (uint32_t)(&IOMUXC_PTC14), + (uint32_t)(&IOMUXC_PTC15), + (uint32_t)(&IOMUXC_PTC16), + (uint32_t)(&IOMUXC_PTC17), + (uint32_t)(&IOMUXC_PTD31), + (uint32_t)(&IOMUXC_PTD30), + (uint32_t)(&IOMUXC_PTD29), + (uint32_t)(&IOMUXC_PTD28), + (uint32_t)(&IOMUXC_PTD27), + (uint32_t)(&IOMUXC_PTD26), + (uint32_t)(&IOMUXC_PTD25), + (uint32_t)(&IOMUXC_PTD24), + (uint32_t)(&IOMUXC_PTD23), + (uint32_t)(&IOMUXC_PTD22), + (uint32_t)(&IOMUXC_PTD21), + (uint32_t)(&IOMUXC_PTD20), + (uint32_t)(&IOMUXC_PTD19), + (uint32_t)(&IOMUXC_PTD18), + (uint32_t)(&IOMUXC_PTD17), + (uint32_t)(&IOMUXC_PTD16), + (uint32_t)(&IOMUXC_PTD0), + (uint32_t)(&IOMUXC_PTD1), + (uint32_t)(&IOMUXC_PTD2), + (uint32_t)(&IOMUXC_PTD3), + (uint32_t)(&IOMUXC_PTD4), + (uint32_t)(&IOMUXC_PTD5), + (uint32_t)(&IOMUXC_PTD6), + (uint32_t)(&IOMUXC_PTD7), + (uint32_t)(&IOMUXC_PTD8), + (uint32_t)(&IOMUXC_PTD9), + (uint32_t)(&IOMUXC_PTD10), + (uint32_t)(&IOMUXC_PTD11), + (uint32_t)(&IOMUXC_PTD12), + (uint32_t)(&IOMUXC_PTD13), + (uint32_t)(&IOMUXC_PTB23), + (uint32_t)(&IOMUXC_PTB24), + (uint32_t)(&IOMUXC_PTB25), + (uint32_t)(&IOMUXC_PTB26), + (uint32_t)(&IOMUXC_PTB27), + (uint32_t)(&IOMUXC_PTB28), + (uint32_t)(&IOMUXC_PTC26), + (uint32_t)(&IOMUXC_PTC27), + (uint32_t)(&IOMUXC_PTC28), + (uint32_t)(&IOMUXC_PTC29), + (uint32_t)(&IOMUXC_PTC30), + (uint32_t)(&IOMUXC_PTC31), + (uint32_t)(&IOMUXC_PTE0), + (uint32_t)(&IOMUXC_PTE1), + (uint32_t)(&IOMUXC_PTE2), + (uint32_t)(&IOMUXC_PTE3), + (uint32_t)(&IOMUXC_PTE4), + (uint32_t)(&IOMUXC_PTE5), + (uint32_t)(&IOMUXC_PTE6), + (uint32_t)(&IOMUXC_PTE7), + (uint32_t)(&IOMUXC_PTE8), + (uint32_t)(&IOMUXC_PTE9), + (uint32_t)(&IOMUXC_PTE10), + (uint32_t)(&IOMUXC_PTE11), + (uint32_t)(&IOMUXC_PTE12), + (uint32_t)(&IOMUXC_PTE13), + (uint32_t)(&IOMUXC_PTE14), + (uint32_t)(&IOMUXC_PTE15), + (uint32_t)(&IOMUXC_PTE16), + (uint32_t)(&IOMUXC_PTE17), + (uint32_t)(&IOMUXC_PTE18), + (uint32_t)(&IOMUXC_PTE19), + (uint32_t)(&IOMUXC_PTE20), + (uint32_t)(&IOMUXC_PTE21), + (uint32_t)(&IOMUXC_PTE22), + (uint32_t)(&IOMUXC_PTE23), + (uint32_t)(&IOMUXC_PTE24), + (uint32_t)(&IOMUXC_PTE25), + (uint32_t)(&IOMUXC_PTE26), + (uint32_t)(&IOMUXC_PTE27), + (uint32_t)(&IOMUXC_PTE28), + (uint32_t)(&IOMUXC_PTA7), +}; + void configure_gpio_pin(uint32_t gpio) { uint32_t iomux_addr = iomux_gpio_pad_addr[gpio]; diff --git a/examples/vf6xx_colibri_m4/pin_mux.h b/examples/vf6xx_colibri_m4/pin_mux.h index ca80bfc..fac4300 100644 --- a/examples/vf6xx_colibri_m4/pin_mux.h +++ b/examples/vf6xx_colibri_m4/pin_mux.h @@ -41,143 +41,7 @@ #include "device_imx.h" -uint32_t iomux_gpio_pad_addr[] = { - (uint32_t)(&IOMUXC_PTA6), - (uint32_t)(&IOMUXC_PTA8), - (uint32_t)(&IOMUXC_PTA9), - (uint32_t)(&IOMUXC_PTA10), - (uint32_t)(&IOMUXC_PTA11), - (uint32_t)(&IOMUXC_PTA12), - (uint32_t)(&IOMUXC_PTA16), - (uint32_t)(&IOMUXC_PTA17), - (uint32_t)(&IOMUXC_PTA18), - (uint32_t)(&IOMUXC_PTA19), - (uint32_t)(&IOMUXC_PTA20), - (uint32_t)(&IOMUXC_PTA21), - (uint32_t)(&IOMUXC_PTA22), - (uint32_t)(&IOMUXC_PTA23), - (uint32_t)(&IOMUXC_PTA24), - (uint32_t)(&IOMUXC_PTA25), - (uint32_t)(&IOMUXC_PTA26), - (uint32_t)(&IOMUXC_PTA27), - (uint32_t)(&IOMUXC_PTA28), - (uint32_t)(&IOMUXC_PTA29), - (uint32_t)(&IOMUXC_PTA30), - (uint32_t)(&IOMUXC_PTA31), - (uint32_t)(&IOMUXC_PTB0), - (uint32_t)(&IOMUXC_PTB1), - (uint32_t)(&IOMUXC_PTB2), - (uint32_t)(&IOMUXC_PTB3), - (uint32_t)(&IOMUXC_PTB4), - (uint32_t)(&IOMUXC_PTB5), - (uint32_t)(&IOMUXC_PTB6), - (uint32_t)(&IOMUXC_PTB7), - (uint32_t)(&IOMUXC_PTB8), - (uint32_t)(&IOMUXC_PTB9), - (uint32_t)(&IOMUXC_PTB10), - (uint32_t)(&IOMUXC_PTB11), - (uint32_t)(&IOMUXC_PTB12), - (uint32_t)(&IOMUXC_PTB13), - (uint32_t)(&IOMUXC_PTB14), - (uint32_t)(&IOMUXC_PTB15), - (uint32_t)(&IOMUXC_PTB16), - (uint32_t)(&IOMUXC_PTB17), - (uint32_t)(&IOMUXC_PTB18), - (uint32_t)(&IOMUXC_PTB19), - (uint32_t)(&IOMUXC_PTB20), - (uint32_t)(&IOMUXC_PTB21), - (uint32_t)(&IOMUXC_PTB22), - (uint32_t)(&IOMUXC_PTC0), - (uint32_t)(&IOMUXC_PTC1), - (uint32_t)(&IOMUXC_PTC2), - (uint32_t)(&IOMUXC_PTC3), - (uint32_t)(&IOMUXC_PTC4), - (uint32_t)(&IOMUXC_PTC5), - (uint32_t)(&IOMUXC_PTC6), - (uint32_t)(&IOMUXC_PTC7), - (uint32_t)(&IOMUXC_PTC8), - (uint32_t)(&IOMUXC_PTC9), - (uint32_t)(&IOMUXC_PTC10), - (uint32_t)(&IOMUXC_PTC11), - (uint32_t)(&IOMUXC_PTC12), - (uint32_t)(&IOMUXC_PTC13), - (uint32_t)(&IOMUXC_PTC14), - (uint32_t)(&IOMUXC_PTC15), - (uint32_t)(&IOMUXC_PTC16), - (uint32_t)(&IOMUXC_PTC17), - (uint32_t)(&IOMUXC_PTD31), - (uint32_t)(&IOMUXC_PTD30), - (uint32_t)(&IOMUXC_PTD29), - (uint32_t)(&IOMUXC_PTD28), - (uint32_t)(&IOMUXC_PTD27), - (uint32_t)(&IOMUXC_PTD26), - (uint32_t)(&IOMUXC_PTD25), - (uint32_t)(&IOMUXC_PTD24), - (uint32_t)(&IOMUXC_PTD23), - (uint32_t)(&IOMUXC_PTD22), - (uint32_t)(&IOMUXC_PTD21), - (uint32_t)(&IOMUXC_PTD20), - (uint32_t)(&IOMUXC_PTD19), - (uint32_t)(&IOMUXC_PTD18), - (uint32_t)(&IOMUXC_PTD17), - (uint32_t)(&IOMUXC_PTD16), - (uint32_t)(&IOMUXC_PTD0), - (uint32_t)(&IOMUXC_PTD1), - (uint32_t)(&IOMUXC_PTD2), - (uint32_t)(&IOMUXC_PTD3), - (uint32_t)(&IOMUXC_PTD4), - (uint32_t)(&IOMUXC_PTD5), - (uint32_t)(&IOMUXC_PTD6), - (uint32_t)(&IOMUXC_PTD7), - (uint32_t)(&IOMUXC_PTD8), - (uint32_t)(&IOMUXC_PTD9), - (uint32_t)(&IOMUXC_PTD10), - (uint32_t)(&IOMUXC_PTD11), - (uint32_t)(&IOMUXC_PTD12), - (uint32_t)(&IOMUXC_PTD13), - (uint32_t)(&IOMUXC_PTB23), - (uint32_t)(&IOMUXC_PTB24), - (uint32_t)(&IOMUXC_PTB25), - (uint32_t)(&IOMUXC_PTB26), - (uint32_t)(&IOMUXC_PTB27), - (uint32_t)(&IOMUXC_PTB28), - (uint32_t)(&IOMUXC_PTC26), - (uint32_t)(&IOMUXC_PTC27), - (uint32_t)(&IOMUXC_PTC28), - (uint32_t)(&IOMUXC_PTC29), - (uint32_t)(&IOMUXC_PTC30), - (uint32_t)(&IOMUXC_PTC31), - (uint32_t)(&IOMUXC_PTE0), - (uint32_t)(&IOMUXC_PTE1), - (uint32_t)(&IOMUXC_PTE2), - (uint32_t)(&IOMUXC_PTE3), - (uint32_t)(&IOMUXC_PTE4), - (uint32_t)(&IOMUXC_PTE5), - (uint32_t)(&IOMUXC_PTE6), - (uint32_t)(&IOMUXC_PTE7), - (uint32_t)(&IOMUXC_PTE8), - (uint32_t)(&IOMUXC_PTE9), - (uint32_t)(&IOMUXC_PTE10), - (uint32_t)(&IOMUXC_PTE11), - (uint32_t)(&IOMUXC_PTE12), - (uint32_t)(&IOMUXC_PTE13), - (uint32_t)(&IOMUXC_PTE14), - (uint32_t)(&IOMUXC_PTE15), - (uint32_t)(&IOMUXC_PTE16), - (uint32_t)(&IOMUXC_PTE17), - (uint32_t)(&IOMUXC_PTE18), - (uint32_t)(&IOMUXC_PTE19), - (uint32_t)(&IOMUXC_PTE20), - (uint32_t)(&IOMUXC_PTE21), - (uint32_t)(&IOMUXC_PTE22), - (uint32_t)(&IOMUXC_PTE23), - (uint32_t)(&IOMUXC_PTE24), - (uint32_t)(&IOMUXC_PTE25), - (uint32_t)(&IOMUXC_PTE26), - (uint32_t)(&IOMUXC_PTE27), - (uint32_t)(&IOMUXC_PTE28), - (uint32_t)(&IOMUXC_PTA7), -}; +extern const uint32_t iomux_gpio_pad_addr[]; /* ** =================================================================== diff --git a/platform/drivers/inc/ccm_vf6xx.h b/platform/drivers/inc/ccm_vf6xx.h index 0443926..2a45a49 100644 --- a/platform/drivers/inc/ccm_vf6xx.h +++ b/platform/drivers/inc/ccm_vf6xx.h @@ -248,20 +248,8 @@ enum ccm_clock_gate { ccmCg191Reserved }; -uint32_t ccm_ccgr_offset[] = { - (uint32_t)(&CCM_CCGR0), - (uint32_t)(&CCM_CCGR1), - (uint32_t)(&CCM_CCGR2), - (uint32_t)(&CCM_CCGR3), - (uint32_t)(&CCM_CCGR4), - (uint32_t)(&CCM_CCGR5), - (uint32_t)(&CCM_CCGR6), - (uint32_t)(&CCM_CCGR7), - (uint32_t)(&CCM_CCGR8), - (uint32_t)(&CCM_CCGR9), - (uint32_t)(&CCM_CCGR10), - (uint32_t)(&CCM_CCGR11), -}; +extern const uint32_t ccm_ccgr_offset[]; + /*! * @brief CCM gate control value */ diff --git a/platform/drivers/src/ccm_vf6xx.c b/platform/drivers/src/ccm_vf6xx.c index b666443..3c57a77 100644 --- a/platform/drivers/src/ccm_vf6xx.c +++ b/platform/drivers/src/ccm_vf6xx.c @@ -31,6 +31,21 @@ #include +const uint32_t ccm_ccgr_offset[] = { + (uint32_t)(&CCM_CCGR0), + (uint32_t)(&CCM_CCGR1), + (uint32_t)(&CCM_CCGR2), + (uint32_t)(&CCM_CCGR3), + (uint32_t)(&CCM_CCGR4), + (uint32_t)(&CCM_CCGR5), + (uint32_t)(&CCM_CCGR6), + (uint32_t)(&CCM_CCGR7), + (uint32_t)(&CCM_CCGR8), + (uint32_t)(&CCM_CCGR9), + (uint32_t)(&CCM_CCGR10), + (uint32_t)(&CCM_CCGR11), +}; + /* ARM Cortex-A5 clock, core clock */ uint32_t ccmCoreClk = 0; /* Platform bus clock and Cortex-M4 core clock */ -- cgit v1.2.3