summaryrefslogtreecommitdiff
path: root/drivers/fsl_pit.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/fsl_pit.c')
-rw-r--r--drivers/fsl_pit.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/fsl_pit.c b/drivers/fsl_pit.c
index 1f2fdfe..e5c3c4e 100644
--- a/drivers/fsl_pit.c
+++ b/drivers/fsl_pit.c
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
- * All rights reserved.
+ * Copyright 2016-2017 NXP
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -12,7 +12,7 @@
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
- * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ * o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
@@ -48,8 +48,10 @@ static uint32_t PIT_GetInstance(PIT_Type *base);
/*! @brief Pointers to PIT bases for each instance. */
static PIT_Type *const s_pitBases[] = PIT_BASE_PTRS;
+#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to PIT clocks for each instance. */
static const clock_ip_name_t s_pitClocks[] = PIT_CLOCKS;
+#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
/*******************************************************************************
* Code
@@ -59,7 +61,7 @@ static uint32_t PIT_GetInstance(PIT_Type *base)
uint32_t instance;
/* Find the instance index from base address mappings. */
- for (instance = 0; instance < FSL_FEATURE_SOC_PIT_COUNT; instance++)
+ for (instance = 0; instance < ARRAY_SIZE(s_pitBases); instance++)
{
if (s_pitBases[instance] == base)
{
@@ -67,7 +69,7 @@ static uint32_t PIT_GetInstance(PIT_Type *base)
}
}
- assert(instance < FSL_FEATURE_SOC_PIT_COUNT);
+ assert(instance < ARRAY_SIZE(s_pitBases));
return instance;
}
@@ -76,8 +78,10 @@ void PIT_Init(PIT_Type *base, const pit_config_t *config)
{
assert(config);
+#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/* Ungate the PIT clock*/
CLOCK_EnableClock(s_pitClocks[PIT_GetInstance(base)]);
+#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
/* Enable PIT timers */
base->MCR &= ~PIT_MCR_MDIS_MASK;
@@ -98,8 +102,10 @@ void PIT_Deinit(PIT_Type *base)
/* Disable PIT timers */
base->MCR |= PIT_MCR_MDIS_MASK;
+#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/* Gate the PIT clock*/
CLOCK_DisableClock(s_pitClocks[PIT_GetInstance(base)]);
+#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
}
#if defined(FSL_FEATURE_PIT_HAS_LIFETIME_TIMER) && FSL_FEATURE_PIT_HAS_LIFETIME_TIMER