resync with FreeRTOS_BSP_1.0.1_iMX7D

20 files changed, 2083 insertions, 0 deletions

diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/gpc.c b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/gpc.c
new file mode 100644
index 0000000..d21b5cd
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/gpc.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "gpc.h"
+
+/*
+ * Initialize GPC settings for dual core low power management
+ */
+void GPC_Init(GPC_Type * base)
+{
+    /*
+     * Disable all M4 interrupt as GPC wakeup source
+     */
+    base->IMR1_M4 = GPC_IMR1_M4_IMR1_M4_MASK;
+    base->IMR2_M4 = GPC_IMR2_M4_IMR2_M4_MASK;
+    base->IMR3_M4 = GPC_IMR3_M4_IMR3_M4_MASK;
+    base->IMR4_M4 = GPC_IMR4_M4_IMR4_M4_MASK;
+
+    /*
+     * Initialize the GPC settings for M4
+     */
+    base->LPCR_M4 |= GPC_LPCR_M4_EN_M4_PUP_MASK |
+        GPC_LPCR_M4_EN_M4_PDN_MASK;  /* EN_M4_PUP, EN_M4_PDN*/
+    base->PGC_ACK_SEL_M4 = GPC_PGC_ACK_SEL_M4_M4_VIRTUAL_PGC_PUP_ACK_MASK |
+        GPC_PGC_ACK_SEL_M4_M4_VIRTUAL_PGC_PDN_ACK_MASK; /* change dummy to virtual*/
+    base->MISC |= GPC_MISC_M4_PDN_REQ_MASK_MASK; /* not mask M4 power down*/
+
+    /*
+     * M4 Virtual domain and Fast Mega domain must use the same PUP/PDN slot
+     * Align to A7, SLT 1 and SLT 5 are used for Fast Mega and M4 Virtual domain
+     */
+    base->SLT_CFG[1] = GPC_SLT_CFG_M4_VIRTUAL_PDN_SLOT_CONTROL_MASK | GPC_SLT_CFG_FASTMEGA_PDN_SLOT_CONTROL_MASK;
+    base->SLT_CFG[5] = GPC_SLT_CFG_M4_VIRTUAL_PUP_SLOT_CONTROL_MASK | GPC_SLT_CFG_FASTMEGA_PUP_SLOT_CONTROL_MASK;
+
+    /* 
+     * Fast map to both A7 and M4
+     *      - M4 only have access to byte 1, A7 only have access to byte 0
+     *      - set to 1 for "map" 
+     */
+    base->PGC_CPU_MAPPING = GPC_PGC_CPU_MAPPING_FASTMEGA_M4_DOMAIN_MASK; 
+}
+
+/*
+ * Enable an interrupt source as GPC wakeup source for M4 core
+ */
+void GPC_EnableM4WakeupIRQ(GPC_Type* base, uint32_t irq_no, GPC_IRQ_WAKEUP_MODE wakeup_mode)
+{
+    uint32_t reg_index, reg_offset;
+    volatile uint32_t* target_reg;
+
+    if (irq_no < TOTAL_IRQ_NUM) {
+        reg_index = irq_no / IRQ_PER_REGISTER;
+        reg_offset = irq_no % IRQ_PER_REGISTER;
+        target_reg = &base->IMR1_M4 + reg_index;
+        if (wakeup_mode == GPC_IRQ_WAKEUP_ENABLE) {
+            /*enable the IRQ as wakeup source*/
+            *target_reg &= ~(1 << reg_offset);
+        }
+        else {
+            /*disable the IRQ as wakeup source*/
+            *target_reg |= 1 << reg_offset;
+        }
+    }
+}
+
+/*
+ * Configure LPCR_M4_LPM, the configured LPM state will be entered
+ * the next time WFI is executed
+ */
+void GPC_SetM4NextLPM(GPC_Type* base, uint32_t lpm_val)
+{
+    if (lpm_val < 4) {
+        base->LPCR_M4 = (base->LPCR_M4 & ~GPC_LPCR_M4_LPM0_MASK) | lpm_val;
+    }
+}
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/gpc.h b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/gpc.h
new file mode 100644
index 0000000..8c61adf
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/gpc.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __GPC_H__
+#define __GPC_H__
+#include "device_imx.h"
+
+#define TOTAL_IRQ_NUM   128
+#define IRQ_PER_REGISTER 32
+
+typedef enum gpc_irq_wakeup_mode {
+    GPC_IRQ_WAKEUP_ENABLE,
+    GPC_IRQ_WAKEUP_DISABLE,
+} GPC_IRQ_WAKEUP_MODE;
+
+void GPC_Init(GPC_Type* base);
+
+void GPC_EnableM4WakeupIRQ(GPC_Type* base, uint32_t irq_no, GPC_IRQ_WAKEUP_MODE wakeup_mode);
+
+void GPC_SetM4NextLPM(GPC_Type* base, uint32_t lpm_val);
+
+#endif
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/lpm_mcore.c b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/lpm_mcore.c
new file mode 100644
index 0000000..c9a5084
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/lpm_mcore.c
@@ -0,0 +1,699 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <string.h>
+#include "board.h"
+#include "lpm_mcore.h"
+#include "debug_console_imx.h"
+#include "ccm_imx7d.h"
+#include "mu_imx.h"
+#include "FreeRTOS.h"
+#include "gpt.h"
+
+#define MAXIMUM_24M_DIV 15
+
+static LPM_POWER_STATUS_M4 m4_lpm_state = LPM_M4_STATE_RUN;
+
+static P_WAKEUP_INT_ELE g_wakeup_int_list;
+
+#if defined(__GNUC__) || defined(__CC_ARM)
+static void RAM_Wfi(void) __attribute__((section(".ram_function")));
+static void RAM_Wfi_End(void) __attribute__((section(".ram_function_end")));
+#elif defined(__ICCARM__)
+#pragma default_function_attributes = @ ".ram_function"
+static void RAM_Wfi(void);
+static void RAM_Wfi_End(void);
+#pragma default_function_attributes =
+#endif
+
+static void GPT_Patch_Prepare(void);
+
+static void (*runInRAM)(void) = NULL;
+
+/*
+ * Send Message to A7
+ */
+static void LPM_MCORE_SendMessage(uint32_t msg)
+{
+    while (0 == (MUB_SR & MU_SR_TEn(0x8 >> LPM_MCORE_MU_CHANNEL)));
+    MUB->TR[LPM_MCORE_MU_CHANNEL] = msg;
+    while ((MUB_SR & MU_SR_EP_MASK) != 0);
+}
+
+#if (defined(LPM_MCORE_PRINT_DEBUG_INFO) && (LPM_MCORE_PRINT_DEBUG_INFO))
+/*
+ * Provide a spinning delay, the actual delay time is dependent on the CPU freq
+ */
+static void my_delay(void)
+{
+    uint32_t i, j, k;
+    for (i=0; i!=DELAY_CNT; i++)
+        for (j=0; j!=DELAY_CNT; j++)
+            for (k=0; k!=DELAY_CNT; k++)
+                __NOP();
+    return;
+}
+
+/*
+ * Use the delay function to demostrate current CPU running freq
+ */
+static void verify_clock_speed(void)
+{
+    uint32_t i;
+    for (i=0; i!=DELAY_LOOP_CNT_LOW_SPEED; i++) {
+        my_delay();
+        PRINTF("\rVerify M4 Speed : %2d of %d ... ", i+1, DELAY_LOOP_CNT_LOW_SPEED);
+    }
+    PRINTF("Done.\r\n");
+}
+#endif
+
+/*
+ * Tool function to copy function area [func_start, func_end] to M4 data area
+ * which is TCM in 7Dual Project
+ */
+static uint8_t* RAM_Function_Copy(uint8_t* func_start, uint8_t* func_end)
+{
+    uint8_t* ram_code_ptr;
+    uint32_t ram_function_start;
+
+    ram_function_start = (uint32_t)func_start & ~0x3;
+    ram_code_ptr = pvPortMalloc((uint8_t*)func_end - (uint8_t*)ram_function_start);
+    memcpy(ram_code_ptr, (uint8_t*)ram_function_start, (uint32_t)func_end -
+           (uint32_t)ram_function_start);
+    ram_code_ptr = (uint8_t *)((uint32_t)ram_code_ptr | ((uint32_t)func_start & 0x3));
+
+    return ram_code_ptr;
+}
+
+/*
+ * This is the critical section of code which should run in TCM and don't
+ * have any other dependency. It will be runtime copied from linked address
+ * to TCM address
+ * Entering it will allow A7 to shutdown highbus. After M4 get wakeup, it
+ * will request A7 to resume highbus. When exiting, the highbus resouces
+ * have been live again
+ */
+static void RAM_Wfi(void) {
+
+    /* 
+     * Use MU to tell A7 high bus can be released
+     *      Note : Function call is not working in this RAM migrated function
+     */
+    while (0 == (MUB_SR & MU_SR_TEn(0x8 >> LPM_MCORE_MU_CHANNEL)));
+    MUB->TR[LPM_MCORE_MU_CHANNEL] = MSG_LPM_M4_RELEASE_HIGHBUS;
+    while ((MUB_SR & MU_SR_EP_MASK) != 0);
+
+    /* 
+     * this WFI will only be wakeup by wakeup interrupt registered
+     * by "LPM_MCORE_RegisterWakeupInterrupt"
+     */
+    __WFI();
+
+    /*
+     * Tell A7 that M4 has return from LPM mode
+     */
+    while (0 == (MUB_SR & MU_SR_TEn(0x8 >> LPM_MCORE_MU_CHANNEL)));
+    MUB->TR[LPM_MCORE_MU_CHANNEL] = MSG_LPM_M4_RUN;
+    while ((MUB_SR & MU_SR_EP_MASK) != 0);
+    /* 
+     * After wakeup, req A7 to resume clock, wait until getting ACK
+     */
+    while (0 == (MUB_SR & MU_SR_TEn(0x8 >> LPM_MCORE_MU_CHANNEL)));
+    MUB->TR[LPM_MCORE_MU_CHANNEL] = MSG_LPM_M4_REQUEST_HIGHBUS;
+    while ((MUB_SR & MU_SR_EP_MASK) != 0);
+
+    while (1)
+    {
+        if ((MUB_SR & (MU_SR_RFn(0x8 >> LPM_MCORE_MU_CHANNEL))) != 0)
+            if (MUB->RR[LPM_MCORE_MU_CHANNEL] == MSG_LPM_A7_HIGHBUS_READY)
+                break;
+    }
+
+    /* 
+     * manual clear MU pending interrupt
+     */
+    NVIC->ICPR[((uint32_t)(MU_M4_IRQn) >> 5)] = (1 << ((uint32_t)(MU_M4_IRQn) & 0x1F));
+}
+
+/*
+ * Stub function which only serves as the end address of function "RAM_Wfi"
+ */
+static void RAM_Wfi_End(void)
+{
+    return;
+}
+
+/*!
+ * @brief Check if "RAM_Wfi" is located inside TCM, if not so, copy it to TCM
+ */
+void prepare_ram_wfi()
+{
+    if (((uint32_t)RAM_Wfi < 0x1FFF8000) || ((uint32_t)RAM_Wfi > 0x20007FFF))
+        // If no, copy the RAM_Wfi function to TCM.
+        runInRAM = (void(*)(void))RAM_Function_Copy((uint8_t *)RAM_Wfi,
+                                                    (uint8_t *)RAM_Wfi_End);
+    else
+        // If yes, just assign RAM_Wfi to runInRAM pointer.
+        runInRAM = RAM_Wfi;
+}
+
+/*
+ * initialize the wakeup interrupt list
+ */
+static void lpm_init_wakeup_interrupt_list() {
+    g_wakeup_int_list = NULL;
+}
+
+/*
+ * add a new irq to wakeup interrupt link list
+ */
+static void lpm_add_wakeup_interrupt_list(uint32_t irq_no)
+{
+    P_WAKEUP_INT_ELE cur_ele = g_wakeup_int_list;
+    P_WAKEUP_INT_ELE p;
+
+    if (cur_ele == NULL) {
+        /*
+         * first element to add
+         */
+        p = pvPortMalloc(sizeof(WAKEUP_INT_ELE));
+        p->irq_no = irq_no;
+        p->next = NULL;
+        g_wakeup_int_list = p;
+    } else {
+        for (;;) {
+            if (cur_ele->irq_no == irq_no) {
+                /*
+                 * already in the link list
+                 *      - return directly
+                 */
+                break;
+            }
+            else if (cur_ele->next == NULL) {
+                /*
+                 * can't find the element
+                 *      - insert into the end
+                 */
+                p = pvPortMalloc(sizeof(WAKEUP_INT_ELE));
+                p->irq_no = irq_no;
+                p->next = NULL;
+                cur_ele->next = p;
+            } else {
+                cur_ele = cur_ele->next;
+            }
+        }
+    }
+}
+
+/*
+ * remove an exsiting irq to wakeup interrupt link list
+ */
+static void lpm_del_wakeup_interrupt_list(uint32_t irq_no)
+{
+    P_WAKEUP_INT_ELE cur_ele = g_wakeup_int_list;
+    P_WAKEUP_INT_ELE p;
+
+    if (cur_ele != NULL) {
+        if (cur_ele->irq_no == irq_no) {
+            /*first element is the target*/
+            p = g_wakeup_int_list;
+            g_wakeup_int_list = p->next;
+            vPortFree(p);
+        } else {
+            for (;;) {
+                p = cur_ele->next;
+                if (p == NULL) {
+                    /*
+                     * can't find the element
+                     *      - return directly
+                     */
+                    break;
+                } else {
+                    if (p->irq_no == irq_no) {
+                        /*
+                         * Find the target "p"
+                         */
+                        cur_ele->next = p->next;
+                        vPortFree(p);
+                        break;
+                    } else {
+                        cur_ele = cur_ele->next;
+                    }
+                }
+            }
+        }
+    }
+}
+
+
+/*
+ * register a IRQ source as M4 wakeup source
+ */
+void LPM_MCORE_RegisterWakeupInterrupt(GPC_Type * base, uint32_t irq_no, GPC_IRQ_WAKEUP_MODE wakeup_mode)
+{
+    /*register wakeup interrupt for M4 in GPC*/
+    GPC_EnableM4WakeupIRQ(base, irq_no, wakeup_mode);
+
+    if (wakeup_mode == GPC_IRQ_WAKEUP_ENABLE) {
+        /*add an element to link list*/
+        lpm_add_wakeup_interrupt_list(irq_no);
+    } else {
+        /*delete an element to link list*/
+        lpm_del_wakeup_interrupt_list(irq_no);
+    }
+}
+
+
+/*
+ * Low Power Management initialization
+ */
+void LPM_MCORE_Init(GPC_Type * base)
+{
+    // Init GPC
+    GPC_Init(base);
+
+    // Copy critical function to TCM Space
+    prepare_ram_wfi();
+
+    // Init the wakeup interrupt link list
+    lpm_init_wakeup_interrupt_list();
+
+    // GPT4 Patch, see function implementation for details
+    GPT_Patch_Prepare();
+}
+
+
+/*
+ * get the current m4 LPM state
+ */
+LPM_POWER_STATUS_M4 LPM_MCORE_GetPowerStatus(GPC_Type * base)
+{
+    return m4_lpm_state;
+} 
+
+/*
+ * on-the-fly change m4 parent clock between 24MHz and 240MHz
+ */
+void LPM_MCORE_ChangeM4Clock(LPM_M4_CLOCK_SPEED target)
+{
+    // change CCM Root to change M4 clock
+    switch (target) {
+        case LPM_M4_LOW_FREQ:
+            if (CCM_GetRootMux(CCM, ccmRootM4) != ccmRootmuxM4Osc24m) {
+            #if (defined(LPM_MCORE_PRINT_DEBUG_INFO) && (LPM_MCORE_PRINT_DEBUG_INFO))
+                PRINTF("Change M4 clock freq to 24M\r\n");
+            #endif
+                CCM_SetRootMux(CCM, ccmRootM4, ccmRootmuxM4Osc24m);
+            }
+            break;
+        case LPM_M4_HIGH_FREQ:
+            if (CCM_GetRootMux(CCM, ccmRootM4) != ccmRootmuxM4SysPllDiv2) {
+            #if (defined(LPM_MCORE_PRINT_DEBUG_INFO) && (LPM_MCORE_PRINT_DEBUG_INFO))
+                PRINTF("Change M4 clock freq to SysPLL Div2 (240M)\r\n");
+            #endif
+                CCM_SetRootMux(CCM, ccmRootM4, ccmRootmuxM4SysPllDiv2);
+            }
+            break;
+        default:
+            break;
+    }
+#if (defined(LPM_MCORE_PRINT_DEBUG_INFO) && (LPM_MCORE_PRINT_DEBUG_INFO))
+    verify_clock_speed();
+#endif
+}
+
+/*
+ * cycle M4 low power mode to next state, the state machine is
+ *
+ *        +---> "RUN" ---> "WAIT" ---> "STOP" ---+
+ *        |                                      |
+ *        +--------------------------------------+
+ */
+void LPM_MCORE_SetPowerStatus(GPC_Type * base, LPM_POWER_STATUS_M4 m4_next_lpm)
+{
+    uint32_t next_lpm = GPC_LPCR_M4_LPM0(0);
+    switch (m4_next_lpm) {
+        case LPM_M4_STATE_RUN:
+            next_lpm = GPC_LPCR_M4_LPM0(0);
+            break;
+        case LPM_M4_STATE_WAIT:
+            next_lpm = GPC_LPCR_M4_LPM0(1);
+            break;
+        case LPM_M4_STATE_STOP:
+            next_lpm = GPC_LPCR_M4_LPM0(2);
+            break;
+        default:
+            break;
+    }
+
+    /*
+     * Patch, let GPC-M4 observe the GPR0 interrupt for a period as long
+     * as 5 32KHz clock cycle before set it to a Low power status
+     */
+    if (m4_next_lpm != LPM_M4_STATE_RUN)
+    {
+        uint32_t i;
+        LPM_MCORE_RegisterWakeupInterrupt(GPC, GPT4_IRQn, GPC_IRQ_WAKEUP_ENABLE);
+        for (i=0; i!=GPC_SYNC_DELAY_CNT; i++)
+            __NOP();
+        LPM_MCORE_RegisterWakeupInterrupt(GPC, GPT4_IRQn, GPC_IRQ_WAKEUP_DISABLE);
+    }
+
+    GPC_SetM4NextLPM(base, next_lpm);
+
+    /*change lpm state variable*/
+    m4_lpm_state = m4_next_lpm;
+}
+
+
+
+/*
+ * Give readable string of current M4 lpm state
+ */
+const char* LPM_MCORE_GetPowerStatusString(void)
+{
+    switch (m4_lpm_state) {
+        case LPM_M4_STATE_RUN:
+            return "RUN";
+        case LPM_M4_STATE_WAIT:
+            return "WAIT";
+        case LPM_M4_STATE_STOP:
+            return "STOP";
+        default:
+            return "UNKNOWN";
+    }
+}
+
+/*
+ * Check if A7 LPM Driver is ready
+ */
+uint32_t LPM_MCORE_CheckPeerReady(void) 
+{
+    return (MU_GetFlags(MUB) & MU_SR_Fn(1));
+}
+
+/*
+ * Use MU Flag to indicate to A7 that low power management in M4 is ready
+ */
+void LPM_MCORE_SetSelfReady(void)
+{
+    MU_SetFlags(MUB, MU_CR_Fn(1));
+}
+
+/*
+ * This function modify BASEPRI to configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY and
+ * wakeup interrupt's NVIC->Priority to configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY - 1
+ * The effect is all non-wakeup interrupt gets mute
+ * The original basepri settings are stored into pBasepriBackup
+ * The original wakeup interrupt nvic->priority settings are stored into linklist
+ */
+void lpm_disable_non_wakeup_interrupt(uint32_t* pBasepriBackup)
+{
+    P_WAKEUP_INT_ELE ele;
+    uint32_t irq_no;
+#if defined(__CC_ARM)
+    register uint32_t __regBasePri __ASM("basepri");
+    *pBasepriBackup = __regBasePri;
+    __regBasePri  = (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - __NVIC_PRIO_BITS));
+#else
+    *pBasepriBackup = __get_BASEPRI();
+    __set_BASEPRI(configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - __NVIC_PRIO_BITS));
+#endif
+    /*
+     * Make exceptions to wakeup interrupts, they are stored in "g_wakeup_int_list"
+     */
+    ele = g_wakeup_int_list;
+    for (;;) {
+        if (ele == NULL)
+            break;
+
+        /* 
+         * Store the current Priority into ele backup field
+         * Change the Priority to "configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY - 1"
+         */
+        irq_no = ele->irq_no;
+        ele->irq_priority_backup = NVIC->IP[irq_no];
+        NVIC->IP[irq_no] = (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY - 1) << (8 - __NVIC_PRIO_BITS);
+
+        /*
+         * Move to next
+         */
+        ele = ele->next;
+    }
+    __DSB();
+    __ISB();
+}
+
+/*
+ * This function restores BASEPRI and wakeup interrupt nvic priority settings
+ * It recover interrupt settings made by lpm_disable_non_wakeup_interrupt
+ */
+void lpm_enable_non_wakeup_interrupt(uint32_t basePriBackup)
+{
+    P_WAKEUP_INT_ELE ele;
+    uint32_t irq_no;
+#if defined(__CC_ARM)
+    register uint32_t __regBasePri __ASM("basepri");
+#endif
+    /*
+     * first restore wakeup interrupt priority
+     */
+    ele = g_wakeup_int_list;
+    for (;;) {
+        if (ele == NULL)
+            break;
+
+        /* 
+         * Restore the original priority
+         */
+        irq_no = ele->irq_no;
+        NVIC->IP[irq_no] = ele->irq_priority_backup;
+
+        /*
+         * Move to next
+         */
+        ele = ele->next;
+    }
+#if defined(__CC_ARM)
+    __regBasePri = basePriBackup & 0xFF;
+#else
+    __set_BASEPRI(basePriBackup);
+#endif
+    // infinite_loop();
+    // Are these necessary?
+    __DSB();
+    __ISB();
+}
+
+
+/*
+ * The sleep function inserted into FreeRTOS idle task hook
+ */
+void LPM_MCORE_WaitForInt(void)
+{
+    uint32_t priMaskBackup;
+
+    /* 
+     * Only when 
+     *      1. A7 peer is ready
+     *      2. safe sleep function has been put into TCM
+     *      3. m4 true sleep mode has been allowed
+     *      4. m4 current lpm mode is wait / stop
+     *  The "power save wfi" routine will be executed
+     *  Otherwise "normal wfi" will be executed
+     *
+     *  In Power Save WFI
+     *      - PRIMASK is set, so all interrupt handler won't be executed
+     *      - BASEPRI and NVIC->Priority is modified so that only wakeup interrupt can
+     *        wake up M4 from WFI
+     *      - After M4 wake up, NVIC->Priority, BASEPRI and PRIMASK are restored so that
+     *        the system return to normal mode
+     *
+     *  There is a critical section code which is in "runInRAM", inside it M4 will
+     *  inform A7 it release the high bus. A7 can then shutdown the high bus which
+     *  will make all highbus related peripherals losing functionality, including
+     *  DDR, so code in "runInRAM" should run in TCM and don't have any access to
+     *  other part of memory
+     */
+    if (LPM_MCORE_CheckPeerReady() && (runInRAM != NULL))
+    {
+        volatile uint32_t* reg_lpcr_m4 = &GPC->LPCR_M4;
+
+        uint32_t next_lpm_mode = *reg_lpcr_m4 & GPC_LPCR_M4_LPM0_MASK;
+        uint32_t basePriBackup;
+
+        /* Save current PRIMASK value. */
+        priMaskBackup = __get_PRIMASK();
+
+        /* 
+         * Set PRIMASK to avoid execution of any enabled ISR. 
+         *      Note : PRIMASK will not prevent interrupt to wake up M4 from WFI
+         *             but it will prevent interrupt handler from running
+         */
+        __set_PRIMASK(1);
+        /* Barriers are normally not required but do ensure the code is completely
+         * within the specified behaviour for the architecture.
+         */
+        __DSB();
+        __ISB();
+        /*
+         * Some of the code should be moved out of "runInRAM"
+         */
+        switch (next_lpm_mode) {
+            case LPCR_M4_RUN:
+                /*
+                 * STOP -> RUN
+                 */
+                /*
+                 * tell A7 the next LPM mode is RUN
+                 */
+                /*
+                 * the WFI will be wakeup by any enabled interrupt
+                 */
+                __WFI();
+                break;
+            case LPCR_M4_WAIT:
+            case LPCR_M4_STOP:
+                /*
+                 * RUN -> WAIT or WAIT -> STOP
+                 */
+                /*
+                 * tell A7 the next LPM mode is WAIT/STOP
+                 */
+                if (next_lpm_mode == LPCR_M4_WAIT)
+                    LPM_MCORE_SendMessage(MSG_LPM_M4_WAIT);
+                else if (next_lpm_mode == LPCR_M4_STOP)
+                    LPM_MCORE_SendMessage(MSG_LPM_M4_STOP);
+                /* 
+                 * do modification to BASEPRI and NVIC->Priority settings so that
+                 * all interrupt except wakeup interrupt are disabled
+                 */
+                lpm_disable_non_wakeup_interrupt(&basePriBackup);
+
+                /*
+                 * Inside "runInRAM", M4 will inform A7 that it release the highbus. Later
+                 * when M4 is waken up, it will request A7 to resume highbus. This section
+                 * of code must run in TCM to avoid accessing highbus dependent resouces
+                 */
+                runInRAM();
+
+                // Restore Basepri and NVIC->Priority settings
+                lpm_enable_non_wakeup_interrupt(basePriBackup);
+                break;
+            default:
+                break;
+        }
+        /* 
+         * Recover PRIMASK register value. this will enable the wakeup interrupt
+         * handler and will activate the main task immediately
+         */
+        __set_PRIMASK(priMaskBackup);
+
+        /* Barriers are normally not required but do ensure the code is completely
+         * within the specified behaviour for the architecture. */
+        __DSB();
+        __ISB();
+    }
+    else {
+        /*
+         * Normal WFI which will be wakeup by any enabled interrupt
+         */
+        __WFI();
+    }
+}
+
+/*
+ * This function implement a patch for "TO1.1" chips
+ *     - In "TO1.1" chips. Everytime a WFI is executed, IC set an internal
+ *       "dsm-request" signal. The signal is NOT deasserted when WFI is
+ *       executed, until a GPC wakeup interrupt happens. When this signal
+ *       asserts, setting "LPM_M4" to "WAIT" or "STOP" will immediately
+ *       cause the M4 core enter sleep mode, rather than the next time "WFI"
+ *       is executed. Only a wakeup interrupt can clear the "dsm-request" signal
+ *
+ *     - The issue is like IC Errata ticket "ERR007265" in i.MX6
+ *
+ *     - As suggested by IC, software should let GPC observe an interrupt long
+ *       enough before setting "LPM_M4". Here we utilize an GPT to trigger this
+ *       interrupt.
+ *
+ *       An GPT will be configured to generate a interrupt at the very beginning,
+ *       this interrupt is masked by M4 NVIC so M4 will not respond to it. But
+ *       every time M4 is wake up, before the next time GPC.LPM_M4 is modified,
+ *       GPC.M4_IMR will be set to unmask this pending interrupt to GPC module
+ *       only, the IRQ will be unmasked for a interval long enough (longer than
+ *       5 32K clock cycle as suggested by IC) and then be masked again.
+ *
+ *     - The function configures GPTB to generate a pending interrupt. 
+ */
+static void GPT_Patch_Prepare(void) {
+    uint64_t counter = 24000 * 5; /* Requrie 5ms to generate the pending interrupt*/
+    uint32_t high;
+    uint32_t div24m, div;
+
+    gpt_init_config_t config = {
+        .freeRun    = false,
+        .waitEnable = true,
+        .stopEnable = true,
+        .dozeEnable = true,
+        .dbgEnable  = false,
+        .enableMode = true
+    };
+
+    GPT_Init(BOARD_GPTB_BASEADDR, &config);
+
+    /* Set GPT clock source to 24M OSC */
+    GPT_SetClockSource(BOARD_GPTB_BASEADDR, gptClockSourceOsc);
+
+    /* Get the value that exceed maximum register counter */
+    high = (uint32_t)(counter >> 32);
+
+    div24m = MAXIMUM_24M_DIV; /*Since we use 24MHz as GPT peripheral clock, here we set the 24M divider to maximum value*/
+    div = high / (div24m + 1); /* Get PRESCALER value */
+
+    /* Now set prescaler */
+    GPT_SetOscPrescaler(BOARD_GPTB_BASEADDR, div24m);
+    GPT_SetPrescaler(BOARD_GPTB_BASEADDR, div);
+
+    /* Set GPT compare value */
+    GPT_SetOutputCompareValue(BOARD_GPTB_BASEADDR, gptOutputCompareChannel1,
+                              (uint32_t)(counter / (div24m + 1) / (div + 1)));
+
+    /* Enable GPT Output Compare1 interrupt */
+    GPT_SetIntCmd(BOARD_GPTB_BASEADDR, gptStatusFlagOutputCompare1, true);
+
+    /* GPT start */
+    GPT_Enable(BOARD_GPTB_BASEADDR);
+
+    /* Wait until timer reaches*/
+    while ((BOARD_GPTB_BASEADDR->SR & gptStatusFlagOutputCompare1) == gptStatusFlagOutputCompare1) {
+        GPT_Disable(BOARD_GPTB_BASEADDR);
+    }
+}
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/lpm_mcore.h b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/lpm_mcore.h
new file mode 100644
index 0000000..6a7a843
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/common/lpm_mcore.h
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __LPM_MCORE_H__
+#define __LPM_MCORE_H__
+
+#include "gpc.h"
+#include "device_imx.h"
+
+#define DELAY_LOOP_CNT_LOW_SPEED 10
+#define DELAY_CNT 100
+
+#define LPCR_M4_RUN  0
+#define LPCR_M4_WAIT 1
+#define LPCR_M4_STOP 2
+
+#define LPM_MCORE_MU_CHANNEL    0
+
+#define LPM_MCORE_PRINT_DEBUG_INFO      0
+
+#define MSG_LPM_M4_RUN                  0x5A5A0001
+#define MSG_LPM_M4_WAIT                 0x5A5A0002
+#define MSG_LPM_M4_STOP                 0x5A5A0003
+
+#define MSG_LPM_M4_REQUEST_HIGHBUS      0x2222CCCC
+#define MSG_LPM_M4_RELEASE_HIGHBUS      0x2222BBBB
+
+#define MSG_LPM_A7_HIGHBUS_READY        0xFFFF6666
+
+#define GPC_SYNC_DELAY_CNT              65536
+
+/*
+ * LPM state of M4 core
+ */
+typedef enum lpm_power_status_m4 {
+    LPM_M4_STATE_RUN,
+    LPM_M4_STATE_WAIT,
+    LPM_M4_STATE_STOP,
+} LPM_POWER_STATUS_M4;
+
+/*
+ * Clock Speed of M4 core
+ */
+typedef enum lpm_m4_clock_speed {
+    LPM_M4_HIGH_FREQ,
+    LPM_M4_LOW_FREQ
+} LPM_M4_CLOCK_SPEED;
+
+/*
+ * Linklist of wakeup interrupt
+ */
+typedef struct wakeup_int_ele WAKEUP_INT_ELE, *P_WAKEUP_INT_ELE;
+struct wakeup_int_ele {
+    P_WAKEUP_INT_ELE next;
+    uint32_t irq_no;
+    uint32_t irq_priority_backup;
+};
+
+/*
+ * low power driver initialization
+ */
+void LPM_MCORE_Init(GPC_Type * base);
+
+/*
+ * get the current lpm state of M4 core
+ */
+LPM_POWER_STATUS_M4 LPM_MCORE_GetPowerStatus(GPC_Type * base);
+
+/*
+ * set the next lpm state of M4 core, the state will be entered
+ * next time WFI is executed
+ */
+void LPM_MCORE_SetPowerStatus(GPC_Type * base, LPM_POWER_STATUS_M4 m4_next_lpm);
+
+/*
+ * provide readable information of current m4 core lpm state
+ */
+const char* LPM_MCORE_GetPowerStatusString(void);
+
+/*
+ * register/unregister a peripherail interrupt to M4 core wakeup interrupt
+ */
+void LPM_MCORE_RegisterWakeupInterrupt(GPC_Type * base, uint32_t irq_no, GPC_IRQ_WAKEUP_MODE wakeup_mode);
+
+/*
+ * change the m4 core clock between 24MHz(OSC) and 240MHz (SysPllDiv2)
+ */
+void LPM_MCORE_ChangeM4Clock(LPM_M4_CLOCK_SPEED target);
+
+/*
+ * Check if A7 LPM driver is ready
+ */
+uint32_t LPM_MCORE_CheckPeerReady(void);
+
+/*
+ * Set M4 LPM driver ready flag to A7 Peer
+ */
+void LPM_MCORE_SetSelfReady(void);
+
+/*
+ * Function to inserted into FreeRTOS idletask hook
+ */
+void LPM_MCORE_WaitForInt(void);
+
+#endif
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/FreeRTOSConfig.h b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/FreeRTOSConfig.h
new file mode 100644
index 0000000..416dbb2
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/FreeRTOSConfig.h
@@ -0,0 +1,163 @@
+/*
+    FreeRTOS V8.0.0 - Copyright (C) 2014 Real Time Engineers Ltd. 
+    All rights reserved
+
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+    ***************************************************************************
+     *                                                                       *
+     *    FreeRTOS provides completely free yet professionally developed,    *
+     *    robust, strictly quality controlled, supported, and cross          *
+     *    platform software that has become a de facto standard.             *
+     *                                                                       *
+     *    Help yourself get started quickly and support the FreeRTOS         *
+     *    project by purchasing a FreeRTOS tutorial book, reference          *
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
+     *                                                                       *
+     *    Thank you!                                                         *
+     *                                                                       *
+    ***************************************************************************
+
+    This file is part of the FreeRTOS distribution.
+
+    FreeRTOS is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License (version 2) as published by the
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+
+    >>! NOTE: The modification to the GPL is included to allow you to distribute
+    >>! a combined work that includes FreeRTOS without being obliged to provide
+    >>! the source code for proprietary components outside of the FreeRTOS
+    >>! kernel.
+
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
+    link: http://www.freertos.org/a00114.html
+
+    1 tab == 4 spaces!
+
+    ***************************************************************************
+     *                                                                       *
+     *    Having a problem?  Start by reading the FAQ "My application does   *
+     *    not run, what could be wrong?"                                     *
+     *                                                                       *
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *
+     *                                                                       *
+    ***************************************************************************
+
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
+    license and Real Time Engineers Ltd. contact details.
+
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
+    licenses offer ticketed support, indemnification and middleware.
+
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+    engineered and independently SIL3 certified version for use in safety and
+    mission critical applications that require provable dependability.
+
+    1 tab == 4 spaces!
+*/
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+/* Ensure stdint is only used by the compiler, and not the assembler. */
+#ifdef __ICCARM__
+    #include <stdint.h>
+#endif
+
+#define configUSE_PREEMPTION              1
+#define configUSE_IDLE_HOOK               1
+#define configUSE_TICK_HOOK               0
+#define configCPU_CLOCK_HZ                (240000000ul)
+#define configTICK_RATE_HZ                ((TickType_t)1000)
+#define configMAX_PRIORITIES              (5)
+#define configMINIMAL_STACK_SIZE          ((unsigned short)130)
+#define configTOTAL_HEAP_SIZE             ((size_t)(20 * 1024))
+#define configMAX_TASK_NAME_LEN           (10)
+#define configUSE_TRACE_FACILITY          0
+#define configUSE_16_BIT_TICKS            0
+#define configIDLE_SHOULD_YIELD           0
+#define configUSE_MUTEXES                 0
+#define configQUEUE_REGISTRY_SIZE         8
+#define configCHECK_FOR_STACK_OVERFLOW    0
+#define configUSE_RECURSIVE_MUTEXES       0
+#define configUSE_MALLOC_FAILED_HOOK      0
+#define configUSE_APPLICATION_TASK_TAG    0
+#define configUSE_COUNTING_SEMAPHORES     0
+#define configGENERATE_RUN_TIME_STATS     0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES             0
+#define configMAX_CO_ROUTINE_PRIORITIES   (2)
+
+/* Software timer definitions. */
+#define configUSE_TIMERS                  0
+#define configTIMER_TASK_PRIORITY         (2)
+#define configTIMER_QUEUE_LENGTH          10
+#define configTIMER_TASK_STACK_DEPTH      (configMINIMAL_STACK_SIZE * 2)
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet          0
+#define INCLUDE_uxTaskPriorityGet         0
+#define INCLUDE_vTaskDelete               0
+#define INCLUDE_vTaskCleanUpResources     0
+#define INCLUDE_vTaskSuspend              1
+#define INCLUDE_vTaskDelayUntil           0
+#define INCLUDE_vTaskDelay                1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+    /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+    #define configPRIO_BITS               __NVIC_PRIO_BITS
+#else
+    #define configPRIO_BITS               4        /* 15 priority levels */
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY         0xf
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY    2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY    (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY    (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
+    
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+#define configASSERT(x) if((x) == 0) {taskDISABLE_INTERRUPTS(); for(;;);}    
+    
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler     SVC_Handler
+#define xPortPendSVHandler  PendSV_Handler
+#define xPortSysTickHandler SysTick_Handler
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/CMakeLists.txt b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/CMakeLists.txt
new file mode 100644
index 0000000..f8bb577
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/CMakeLists.txt
@@ -0,0 +1,178 @@
+INCLUDE(CMakeForceCompiler)
+
+# CROSS COMPILER SETTING
+SET(CMAKE_SYSTEM_NAME Generic)
+CMAKE_MINIMUM_REQUIRED (VERSION 2.6)
+
+# THE VERSION NUMBER
+SET (Tutorial_VERSION_MAJOR 1)
+SET (Tutorial_VERSION_MINOR 0)
+
+# ENABLE ASM
+ENABLE_LANGUAGE(ASM)
+
+SET(CMAKE_STATIC_LIBRARY_PREFIX)
+SET(CMAKE_STATIC_LIBRARY_SUFFIX)
+
+SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
+SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
+
+ 
+# CURRENT DIRECTORY
+SET(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
+
+# DEBUG LINK FILE
+set(CMAKE_EXE_LINKER_FLAGS_DEBUG "${CMAKE_EXE_LINKER_FLAGS_DEBUG} -T${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_tcm.ld  -static")
+
+# RELEASE LINK FILE
+set(CMAKE_EXE_LINKER_FLAGS_RELEASE "${CMAKE_EXE_LINKER_FLAGS_RELEASE} -T${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_tcm.ld  -static")
+
+# DEBUG ASM FLAGS
+SET(CMAKE_ASM_FLAGS_DEBUG "${CMAKE_ASM_FLAGS_DEBUG} -g  -mcpu=cortex-m4  -mfloat-abi=hard  -mfpu=fpv4-sp-d16  -mthumb  -Wall  -fno-common  -ffunction-sections  -fdata-sections  -ffreestanding  -fno-builtin  -mapcs  -std=gnu99")
+
+# DEBUG C FLAGS
+SET(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -g  -O0  -mcpu=cortex-m4  -mfloat-abi=hard  -mfpu=fpv4-sp-d16  -mthumb  -MMD  -MP  -Wall  -fno-common  -ffunction-sections  -fdata-sections  -ffreestanding  -fno-builtin  -mapcs  -std=gnu99")
+
+# DEBUG LD FLAGS
+SET(CMAKE_EXE_LINKER_FLAGS_DEBUG "${CMAKE_EXE_LINKER_FLAGS_DEBUG} -g  -mcpu=cortex-m4  -mfloat-abi=hard  -mfpu=fpv4-sp-d16  --specs=nano.specs  -lm  -Wall  -fno-common  -ffunction-sections  -fdata-sections  -ffreestanding  -fno-builtin  -Os  -mthumb  -mapcs  -Xlinker --gc-sections  -Xlinker -static  -Xlinker -z  -Xlinker muldefs")
+
+# RELEASE ASM FLAGS
+SET(CMAKE_ASM_FLAGS_RELEASE "${CMAKE_ASM_FLAGS_RELEASE} -mcpu=cortex-m4  -mfloat-abi=hard  -mfpu=fpv4-sp-d16  -mthumb  -Wall  -fno-common  -ffunction-sections  -fdata-sections  -ffreestanding  -fno-builtin  -mapcs  -std=gnu99")
+
+# RELEASE C FLAGS
+SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Os  -mcpu=cortex-m4  -mfloat-abi=hard  -mfpu=fpv4-sp-d16  -mthumb  -MMD  -MP  -Wall  -fno-common  -ffunction-sections  -fdata-sections  -ffreestanding  -fno-builtin  -mapcs  -std=gnu99")
+
+# RELEASE LD FLAGS
+SET(CMAKE_EXE_LINKER_FLAGS_RELEASE "${CMAKE_EXE_LINKER_FLAGS_RELEASE} -mcpu=cortex-m4  -mfloat-abi=hard  -mfpu=fpv4-sp-d16  --specs=nano.specs  -lm  -Wall  -fno-common  -ffunction-sections  -fdata-sections  -ffreestanding  -fno-builtin  -Os  -mthumb  -mapcs  -Xlinker --gc-sections  -Xlinker -static  -Xlinker -z  -Xlinker muldefs")
+
+# ASM MACRO
+SET(CMAKE_ASM_FLAGS_DEBUG "${CMAKE_ASM_FLAGS_DEBUG}  -D__DEBUG")
+
+# C MACRO
+SET(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG}  -D__DEBUG")
+SET(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG}  -DCPU_MCIMX7D_M4")
+SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE}  -D__NDEBUG")
+SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE}  -DCPU_MCIMX7D_M4")
+
+# CXX MACRO
+
+# INCLUDE_DIRECTORIES
+IF(CMAKE_BUILD_TYPE MATCHES Debug)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../..)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/..)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/portable/GCC/ARM_CM4F)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/CMSIS/Include)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/devices)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/include)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/startup)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/drivers/inc)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/utilities/inc)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../..)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../common)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/..)
+ELSEIF(CMAKE_BUILD_TYPE MATCHES Release)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../..)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/..)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/portable/GCC/ARM_CM4F)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/CMSIS/Include)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/devices)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/include)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/startup)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/drivers/inc)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../../platform/utilities/inc)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../../..)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/../../common)
+    INCLUDE_DIRECTORIES(${ProjDirPath}/..)
+ENDIF()
+
+# ADD_EXECUTABLE
+ADD_EXECUTABLE(rand_wfi_imx7d 
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h"
+    "${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/startup/gcc/startup_MCIMX7D_M4.S"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/portable/MemMang/heap_2.c"
+    "${ProjDirPath}/../FreeRTOSConfig.h"
+    "${ProjDirPath}/../main.c"
+    "${ProjDirPath}/../../common/gpc.c"
+    "${ProjDirPath}/../../common/gpc.h"
+    "${ProjDirPath}/../../common/lpm_mcore.c"
+    "${ProjDirPath}/../../common/lpm_mcore.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/croutine.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/event_groups.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/FreeRTOS.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/list.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/mpu_wrappers.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/portable.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/projdefs.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/queue.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/semphr.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/StackMacros.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/task.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include/timers.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/ccm_analog_imx7d.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/ccm_imx7d.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/lmem.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/rdc.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/rdc_defs_imx7d.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/wdog_imx.h"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/croutine.c"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/event_groups.c"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/list.c"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/queue.c"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/tasks.c"
+    "${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/timers.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/ccm_analog_imx7d.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/ccm_imx7d.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/lmem.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/rdc.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/wdog_imx.c"
+    "${ProjDirPath}/../../../../../../platform/utilities/src/debug_console_imx.c"
+    "${ProjDirPath}/../../../../../../platform/utilities/inc/debug_console_imx.h"
+    "${ProjDirPath}/../../../../../../platform/utilities/src/print_scan.c"
+    "${ProjDirPath}/../../../../../../platform/utilities/src/print_scan.h"
+    "${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/startup/system_MCIMX7D_M4.c"
+    "${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/startup/system_MCIMX7D_M4.h"
+    "${ProjDirPath}/../../../../pin_mux.c"
+    "${ProjDirPath}/../../../../pin_mux.h"
+    "${ProjDirPath}/../../../../board.c"
+    "${ProjDirPath}/../../../../board.h"
+    "${ProjDirPath}/../../../../clock_freq.c"
+    "${ProjDirPath}/../../../../clock_freq.h"
+    "${ProjDirPath}/../hardware_init.c"
+    "${ProjDirPath}/../../../../gpio_pins.c"
+    "${ProjDirPath}/../../../../gpio_pins.h"
+    "${ProjDirPath}/../gpt_timer.c"
+    "${ProjDirPath}/../gpt_timer.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/uart_imx.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/uart_imx.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/gpt.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/gpt.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/mu_imx.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/mu_imx.h"
+    "${ProjDirPath}/../../../../../../platform/drivers/src/rdc_semaphore.c"
+    "${ProjDirPath}/../../../../../../platform/drivers/inc/rdc_semaphore.h"
+)
+SET_TARGET_PROPERTIES(rand_wfi_imx7d PROPERTIES OUTPUT_NAME "rand_wfi_imx7d.elf")
+
+TARGET_LINK_LIBRARIES(rand_wfi_imx7d -Wl,--start-group)
+# LIBRARIES
+IF(CMAKE_BUILD_TYPE MATCHES Debug)
+ELSEIF(CMAKE_BUILD_TYPE MATCHES Release)
+ENDIF()
+
+# SYSTEM LIBRARIES
+TARGET_LINK_LIBRARIES(rand_wfi_imx7d m)
+TARGET_LINK_LIBRARIES(rand_wfi_imx7d c)
+TARGET_LINK_LIBRARIES(rand_wfi_imx7d gcc)
+TARGET_LINK_LIBRARIES(rand_wfi_imx7d nosys)
+TARGET_LINK_LIBRARIES(rand_wfi_imx7d -Wl,--end-group)
+
+# MAP FILE
+SET(CMAKE_EXE_LINKER_FLAGS_DEBUG "${CMAKE_EXE_LINKER_FLAGS_DEBUG}  -Xlinker -Map=debug/rand_wfi_imx7d.map")
+SET(CMAKE_EXE_LINKER_FLAGS_RELEASE "${CMAKE_EXE_LINKER_FLAGS_RELEASE}  -Xlinker -Map=release/rand_wfi_imx7d.map")
+
+# BIN AND HEX
+ADD_CUSTOM_COMMAND(TARGET rand_wfi_imx7d POST_BUILD COMMAND ${CMAKE_OBJCOPY} -Oihex ${EXECUTABLE_OUTPUT_PATH}/rand_wfi_imx7d.elf ${EXECUTABLE_OUTPUT_PATH}/rand_wfi_imx7d.hex)
+ADD_CUSTOM_COMMAND(TARGET rand_wfi_imx7d POST_BUILD COMMAND ${CMAKE_OBJCOPY} -Obinary ${EXECUTABLE_OUTPUT_PATH}/rand_wfi_imx7d.elf ${EXECUTABLE_OUTPUT_PATH}/rand_wfi_imx7d.bin)
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_all.bat b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_all.bat
new file mode 100644
index 0000000..0cf721f
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_all.bat
@@ -0,0 +1,5 @@
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=Debug  .
+mingw32-make -j4
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=Release  .
+mingw32-make -j4
+pause
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_all.sh b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_all.sh
new file mode 100755
index 0000000..3827529
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_all.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug  .
+make -j4
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release  .
+make -j4
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_debug.bat b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_debug.bat
new file mode 100644
index 0000000..e9ccfdd
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_debug.bat
@@ -0,0 +1,3 @@
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=Debug  .
+mingw32-make -j4
+pause
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_debug.sh b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_debug.sh
new file mode 100755
index 0000000..effd076
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_debug.sh
@@ -0,0 +1,3 @@
+#!/bin/sh
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug  .
+make -j4
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_release.bat b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_release.bat
new file mode 100644
index 0000000..0759349
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_release.bat
@@ -0,0 +1,3 @@
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=Release  .
+mingw32-make -j4
+pause
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_release.sh b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_release.sh
new file mode 100755
index 0000000..a12067d
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/build_release.sh
@@ -0,0 +1,3 @@
+#!/bin/sh
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release  .
+make -j4
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/clean.bat b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/clean.bat
new file mode 100644
index 0000000..ffea088
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/clean.bat
@@ -0,0 +1,3 @@
+RD /s /Q Debug Release CMakeFiles
+DEL /s /Q /F Makefile cmake_install.cmake CMakeCache.txt
+pause
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/clean.sh b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/clean.sh
new file mode 100755
index 0000000..795ad87
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/armgcc/clean.sh
@@ -0,0 +1,3 @@
+#!/bin/sh
+rm -rf debug release CMakeFiles
+rm -rf Makefile cmake_install.cmake CMakeCache.txt
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/ds5/.cproject b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/ds5/.cproject
new file mode 100644
index 0000000..c18a05c
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/ds5/.cproject
@@ -0,0 +1,137 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.arm.eclipse.build.config.baremetal.exe.debug.893051445.1002809623">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.baremetal.exe.debug.893051445.1002809623" moduleId="org.eclipse.cdt.core.settings" name="debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.arm.eclipse.builder.armcc.error" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="com.arm.eclipse.build.artefact.baremetal.exe" buildProperties="org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug,org.eclipse.cdt.build.core.buildArtefactType=com.arm.eclipse.build.artefact.baremetal.exe" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.baremetal.exe.debug.893051445.1002809623" name="debug" parent="com.arm.eclipse.build.config.baremetal.exe.debug" postbuildStep="fromelf --bincombined --output=${ProjName}.bin ${ProjName}.axf">
+					<folderInfo id="com.arm.eclipse.build.config.baremetal.exe.debug.893051445.1002809623." name="/" resourcePath="">
+						<toolChain errorParsers="com.arm.eclipse.builder.armcc.error" id="com.arm.toolchain.baremetal.exe.debug.505048968" name="ARM Compiler" nonInternalBuilderId="com.arm.toolchain.baremetal.builder" superClass="com.arm.toolchain.baremetal.exe.debug">
+							<targetPlatform binaryParser="" id="com.arm.toolchain.baremetal.exe.debug.505048968.350348883" name=""/>
+							<builder autoBuildTarget="all" buildPath="${workspace_loc:/app/debug}" cleanBuildTarget="clean" id="org.eclipse.cdt.build.core.internal.builder.38020294" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="CDT Internal Builder" superClass="org.eclipse.cdt.build.core.internal.builder"/>
+							<tool command="armcc" commandLinePattern="${COMMAND} ${FLAGS} ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="" id="com.arm.tool.c.compiler.baremetal.exe.debug.1725848509" name="ARM C Compiler" superClass="com.arm.tool.c.compiler.baremetal.exe.debug">
+								<option id="com.arm.tool.c.compiler.option.incpath.349366493" name="Include path (-I)" superClass="com.arm.tool.c.compiler.option.incpath"><listOptionValue builtIn="false" value="${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/portable/RVDS/ARM_CM4F"/><listOptionValue builtIn="false" value="${ProjDirPath}/../../../../../../platform/CMSIS/Include"/><listOptionValue builtIn="false" value="${ProjDirPath}/../../../../../../platform/devices"/><listOptionValue builtIn="false" value="${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/include"/><listOptionValue builtIn="false" value="${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/startup"/><listOptionValue builtIn="false" value="${ProjDirPath}/../../../../../../platform/drivers/inc"/><listOptionValue builtIn="false" value="${ProjDirPath}/../../../../../../rtos/FreeRTOS/Source/include"/><listOptionValue builtIn="false" value="${ProjDirPath}/../../../../../../platform/utilities/inc"/><listOptionValue builtIn="false" value="${ProjDirPath}/../../../.."/><listOptionValue builtIn="false" value="${ProjDirPath}/../../common"/><listOptionValue builtIn="false" value="${ProjDirPath}/.."/></option>
+								<option id="com.arm.tool.c.compiler.option.defmac.1627388367" name="Define macro (-D)" superClass="com.arm.tool.c.compiler.option.defmac"><listOptionValue builtIn="false" value="__DEBUG"/><listOptionValue builtIn="false" value="CPU_MCIMX7D_M4"/></option>
+								<option id="com.arm.tool.c.compiler.option.targetcpu.1309268616" name="Target CPU (--cpu)" superClass="com.arm.tool.c.compiler.option.targetcpu" value="Cortex-M4" valueType="string"/>
+								<option id="com.arm.tool.c.compiler.option.targetfpu.1098489790" name="Target FPU (--fpu)" superClass="com.arm.tool.c.compiler.option.targetfpu" value="FPv4-SP" valueType="string"/>
+								<option id="com.arm.tool.c.compiler.option.fpmode.1539082142" name="Floating-point mode (--fpmode)" superClass="com.arm.tool.c.compiler.option.fpmode" value="com.arm.tool.c.compiler.option.fpmode.default" valueType="enumerated"/>
+								<option id="com.arm.tool.c.compiler.option.fppcs.928968199" name="Floating-point PCS (--apcs)" superClass="com.arm.tool.c.compiler.option.fppcs" value="com.arm.tool.c.compiler.option.fppcs.auto" valueType="enumerated"/>
+								<option id="com.arm.tool.c.compiler.option.flags.49715708" name="Other flags" superClass="com.arm.tool.c.compiler.option.flags" value="--c99 --split_sections " valueType="string"/>
+								<option id="com.arm.tool.c.compiler.options.debug.enabled.652416105" name="Enable debug (-g)" superClass="com.arm.tool.c.compiler.options.debug.enabled" value="true" valueType="boolean"/>
+								<option id="com.arm.tool.assembler.option.preproc.664063762" name="Preprocess input before assembling (--cpreproc)" superClass="com.arm.tool.assembler.option.preproc" value="false" valueType="boolean"/>
+								<option id="com.arm.tool.c.compiler.option.endian.2486374826" name="Byte order" superClass="com.arm.tool.c.compiler.option.endian" value="com.arm.tool.c.compiler.option.endian.auto" valueType="enumerated"/>
+								<inputType id="com.arm.tool.c.compiler.input.1814530651" superClass="com.arm.tool.c.compiler.input"/>
+								<inputType id="com.arm.tool.cpp.compiler.input.988841684" superClass="com.arm.tool.cpp.compiler.input"/>
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+							<tool id="com.arm.tool.cpp.compiler.baremetal.exe.debug.1769458477" name="ARM C++ Compiler" superClass="com.arm.tool.cpp.compiler.baremetal.exe.debug">
+								<option id="com.arm.tool.c.compiler.option.flags.125692915" name="Other flags" superClass="com.arm.tool.c.compiler.option.flags" value="--c99 --split_sections " valueType="string"/>
+							</tool>
+							<tool command="armasm" commandLinePattern="${COMMAND} ${FLAGS} ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="" id="com.arm.tool.assembler.1155958963" name="ARM Assembler" superClass="com.arm.tool.assembler">
+								<option id="com.arm.tool.assembler.option.cpu.423475341" name="Target CPU (--cpu)" superClass="com.arm.tool.assembler.option.cpu" value="Cortex-M4" valueType="string"/>
+								<option id="com.arm.tool.assembler.option.fpu.560570852" name="Target FPU (--fpu)" superClass="com.arm.tool.assembler.option.fpu" value="FPv4-SP" valueType="string"/>
+								<option id="com.arm.tool.assembler.option.fpmode.2114797651" name="Floating-point mode (--fpmode)" superClass="com.arm.tool.assembler.option.fpmode" value="com.arm.tool.c.compiler.option.fpmode.default" valueType="enumerated"/>
+								<option id="com.arm.tool.assembler.option.fppcs.2043711002" name="Floating-point PCS (--apcs)" superClass="com.arm.tool.assembler.option.fppcs" value="com.arm.tool.c.compiler.option.fppcs.auto" valueType="enumerated"/>
+								<option id="com.arm.tool.assembler.option.flags.2068342579" name="Other flags" superClass="com.arm.tool.assembler.option.flags" value="-I&quot;${ProjDirPath}/../../../..&quot; -I&quot;${ProjDirPath}/..&quot; " valueType="string"/>
+								<option id="com.arm.tool.assembler.option.preproc.664063762" name="Preprocess input before assembling (--cpreproc)" superClass="com.arm.tool.assembler.option.preproc" value="true" valueType="boolean"/>
+							<option id="com.arm.tool.assembler.option.preprocflags.2957627375" superClass="com.arm.tool.assembler.option.preprocflags" valueType="string" value="-D__DEBUG"/><option id="com.arm.tool.assembler.option.unalign.2723358418" superClass="com.arm.tool.assembler.option.unalign" valueType="boolean" value="false"/><option id="com.arm.tool.assembler.option.inter.5237082042" superClass="com.arm.tool.assembler.option.inter" valueType="boolean" value="false"/><option id="com.arm.tool.assembler.option.inst.7936470056" superClass="com.arm.tool.assembler.option.inst" valueType="enumerated" value="com.arm.tool.c.compiler.option.inst.auto"/><option id="com.arm.tool.assembler.option.endian.332174335" superClass="com.arm.tool.assembler.option.endian" valueType="enumerated" value="com.arm.tool.c.compiler.option.endian.little"/><option id="com.arm.tool.assembler.option.debug.format.3504760021" superClass="com.arm.tool.assembler.option.debug.format" valueType="enumerated" value="com.arm.tool.c.compiler.options.debug.format.auto"/><option id="com.arm.tool.assembler.option.sup.8691681636" superClass="com.arm.tool.assembler.option.sup" valueType="string" value="1296,66"/></tool>
+							<tool command="armlink" commandLinePattern="${COMMAND} ${FLAGS} ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="" id="com.arm.tool.c.linker.1088675316" name="ARM Linker" superClass="com.arm.tool.c.linker">
+								<option id="com.arm.tool.c.linker.option.cpu.267638742" name="Target CPU (--cpu)" superClass="com.arm.tool.c.linker.option.cpu" value="Cortex-M4" valueType="string"/>
+								<option id="com.arm.tool.c.linker.option.scatter.1868789905" name="Scatter file (--scatter)" superClass="com.arm.tool.c.linker.option.scatter" value="${ProjDirPath}/../../../../../../platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_tcm.scf" valueType="string"/>
+								<option id="com.arm.tool.c.linker.option.libs.1325797835" name="Libraries (--library)" superClass="com.arm.tool.c.linker.option.libs"/>
+								<option id="com.arm.tool.c.linker.option.libsearch.1542315655" name="Library search path (--userlibpath)" superClass="com.arm.tool.c.linker.option.libsearch"/>
+								<option id="com.arm.tool.c.linker.libs.491659161" name="Other library files" superClass="com.arm.tool.c.linker.libs"/>
+								<option id="com.arm.tool.c.linker.option.entry.1665317816" name="Image entry point (--entry)" superClass="com.arm.tool.c.linker.option.entry" value="Reset_Handler" valueType="string"/>
+								<option id="com.arm.tool.c.linker.option.imagemap.909474066" name="Generate image map (--map)" superClass="com.arm.tool.c.linker.option.imagemap" value="false" valueType="boolean"/>
+								<option id="com.arm.tool.c.linker.option.syslibs.948170747" name="Standard library search path (--libpath)" superClass="com.arm.tool.c.linker.option.syslibs"/>
+
+								<inputType id="com.arm.tool.c.linker.input.334720080" superClass="com.arm.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							<option id="com.arm.tool.c.linker.option.fpu.5628464445" superClass="com.arm.tool.c.linker.option.fpu" valueType="string" value="FPv4-SP"/><option id="com.arm.tool.c.linker.option.sizes.9176260693" superClass="com.arm.tool.c.linker.option.sizes" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.totals.6398700423" superClass="com.arm.tool.c.linker.option.totals" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.compress.6006481440" superClass="com.arm.tool.c.linker.option.compress" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.stack.2481103369" superClass="com.arm.tool.c.linker.option.stack" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.inlineinfo.4049394872" superClass="com.arm.tool.c.linker.option.inlineinfo" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.elim.9309560836" superClass="com.arm.tool.c.linker.option.elim" valueType="boolean" value="false"/></tool>
+							<tool id="com.arm.tool.librarian.109887334" name="ARM Librarian" superClass="com.arm.tool.librarian"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.arm.eclipse.build.config.baremetal.exe.debug.2022285397.1552618666">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.baremetal.exe.debug.2022285397.1552618666" moduleId="org.eclipse.cdt.core.settings" name="release">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.arm.eclipse.builder.armcc.error" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="com.arm.eclipse.build.artefact.baremetal.exe" buildProperties="org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug,org.eclipse.cdt.build.core.buildArtefactType=com.arm.eclipse.build.artefact.baremetal.exe" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.baremetal.exe.debug.2022285397.1552618666" name="release" parent="com.arm.eclipse.build.config.baremetal.exe.debug" postbuildStep="fromelf --bincombined --output=${ProjName}.bin ${ProjName}.axf">
+					<folderInfo id="com.arm.eclipse.build.config.baremetal.exe.debug.2022285397.1552618666." name="/" resourcePath="">
+						<toolChain id="com.arm.toolchain.baremetal.exe.debug.1871020344" name="ARM Compiler" nonInternalBuilderId="com.arm.toolchain.baremetal.builder" superClass="com.arm.toolchain.baremetal.exe.debug">
+							<targetPlatform id="com.arm.toolchain.baremetal.exe.debug.1871020344.229212655" name=""/>
+							<builder autoBuildTarget="all" buildPath="${workspace_loc:/app/release}" cleanBuildTarget="clean" id="org.eclipse.cdt.build.core.internal.builder.1172218807" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="CDT Internal Builder" superClass="org.eclipse.cdt.build.core.internal.builder"/>
+							<tool id="com.arm.tool.c.compiler.baremetal.exe.debug.724686906" name="ARM C Compiler" superClass="com.arm.tool.c.compiler.baremetal.exe.debug">
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+								<option id="com.arm.tool.c.compiler.option.defmac.741292309" name="Define macro (-D)" superClass="com.arm.tool.c.compiler.option.defmac"><listOptionValue builtIn="false" value="__NDEBUG"/><listOptionValue builtIn="false" value="CPU_MCIMX7D_M4"/></option>
+								<option id="com.arm.tool.c.compiler.option.targetcpu.499083253" name="Target CPU (--cpu)" superClass="com.arm.tool.c.compiler.option.targetcpu" value="Cortex-M4" valueType="string"/>
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+								<option id="com.arm.tool.c.compiler.option.fppcs.1131381472" name="Floating-point PCS (--apcs)" superClass="com.arm.tool.c.compiler.option.fppcs" value="com.arm.tool.c.compiler.option.fppcs.auto" valueType="enumerated"/>
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+							<tool id="com.arm.tool.cpp.compiler.baremetal.exe.debug.1278927352" name="ARM C++ Compiler" superClass="com.arm.tool.cpp.compiler.baremetal.exe.debug">
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+								<option id="com.arm.tool.assembler.option.fppcs.1033303317" name="Floating-point PCS (--apcs)" superClass="com.arm.tool.assembler.option.fppcs" value="com.arm.tool.c.compiler.option.fppcs.auto" valueType="enumerated"/>
+								<option id="com.arm.tool.assembler.option.flags.1985199179" name="Other flags" superClass="com.arm.tool.assembler.option.flags" value="-I&quot;${ProjDirPath}/../../../..&quot; -I&quot;${ProjDirPath}/..&quot; " valueType="string"/>
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+							<tool id="com.arm.tool.c.linker.1301355868" name="ARM Linker" superClass="com.arm.tool.c.linker">
+								<option id="com.arm.tool.c.linker.option.cpu.522518248" name="Target CPU (--cpu)" superClass="com.arm.tool.c.linker.option.cpu" value="Cortex-M4" valueType="string"/>
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+								<option id="com.arm.tool.c.linker.option.libs.1119897339" name="Libraries (--library)" superClass="com.arm.tool.c.linker.option.libs"/>
+								<option id="com.arm.tool.c.linker.option.libsearch.226638094" name="Library search path (--userlibpath)" superClass="com.arm.tool.c.linker.option.libsearch"/>
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+								<option id="com.arm.tool.c.linker.option.entry.2139204104" name="Image entry point (--entry)" superClass="com.arm.tool.c.linker.option.entry" value="Reset_Handler" valueType="string"/>
+								<option id="com.arm.tool.c.linker.option.imagemap.754891612" name="Generate image map (--map)" superClass="com.arm.tool.c.linker.option.imagemap" value="false" valueType="boolean"/>
+								<option id="com.arm.tool.c.linker.option.syslibs.948170748" name="Standard library search path (--libpath)" superClass="com.arm.tool.c.linker.option.syslibs"/>
+
+								<inputType id="com.arm.tool.c.linker.input.2130990920" superClass="com.arm.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							<option id="com.arm.tool.c.linker.option.fpu.2041251370" superClass="com.arm.tool.c.linker.option.fpu" valueType="string" value="FPv4-SP"/><option id="com.arm.tool.c.linker.option.sizes.5299988105" superClass="com.arm.tool.c.linker.option.sizes" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.totals.1113416653" superClass="com.arm.tool.c.linker.option.totals" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.compress.3240820591" superClass="com.arm.tool.c.linker.option.compress" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.stack.4521357055" superClass="com.arm.tool.c.linker.option.stack" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.inlineinfo.9773800889" superClass="com.arm.tool.c.linker.option.inlineinfo" valueType="boolean" value="false"/><option id="com.arm.tool.c.linker.option.elim.7974072547" superClass="com.arm.tool.c.linker.option.elim" valueType="boolean" value="false"/></tool>
+							<tool id="com.arm.tool.librarian.2006874949" name="ARM Librarian" superClass="com.arm.tool.librarian"/>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="com.arm.eclipse.build.project.baremetal.exe.1023008919" name="Bare-metal Executable" projectType="com.arm.eclipse.build.project.baremetal.exe"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.arm.eclipse.build.config.baremetal.exe.debug.893051445;com.arm.eclipse.build.config.baremetal.exe.debug.893051445.;com.arm.tool.c.compiler.baremetal.exe.debug.1501911384;com.arm.tool.c.compiler.input.905747706">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.arm.eclipse.builder.armcc.ARMCompilerDiscoveryProfile"/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope" versionNumber="1">
+		<resource resourceType="PROJECT" workspacePath="/app"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+</cproject>
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/ds5/.project b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/ds5/.project
new file mode 100644
index 0000000..f80c2fa
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/ds5/.project
@@ -0,0 +1,86 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>rand_wfi_imx7d_imx7d_sdb_m4</name>
+	<comment/>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+				<dictionary>
+					<key>?name?</key>
+					<value/>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.append_environment</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
+					<value>all</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.buildArguments</key>
+					<value/>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.buildCommand</key>
+					<value>make</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.buildLocation</key>
+					<value/>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
+					<value>clean</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.contents</key>
+					<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
+					<value>false</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableFullBuild</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
+					<value>all</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.stopOnError</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
+					<value>true</value>
+				</dictionary>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+	<link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/port.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/portmacro.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/portable/RVDS/ARM_CM4F/portmacro.h</locationURI></link><link><name>startup</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>startup/startup_MCIMX7D_M4.s</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/devices/MCIMX7D/startup/arm/startup_MCIMX7D_M4.s</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/heap_2.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/portable/MemMang/heap_2.c</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/FreeRTOSConfig.h</name><type>1</type><locationURI>PARENT-1-PROJECT_LOC/FreeRTOSConfig.h</locationURI></link><link><name>source</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>source/main.c</name><type>1</type><locationURI>PARENT-1-PROJECT_LOC/main.c</locationURI></link><link><name>source</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>source/gpc.c</name><type>1</type><locationURI>PARENT-2-PROJECT_LOC/common/gpc.c</locationURI></link><link><name>source</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>source/gpc.h</name><type>1</type><locationURI>PARENT-2-PROJECT_LOC/common/gpc.h</locationURI></link><link><name>source</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>source/lpm_mcore.c</name><type>1</type><locationURI>PARENT-2-PROJECT_LOC/common/lpm_mcore.c</locationURI></link><link><name>source</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>source/lpm_mcore.h</name><type>1</type><locationURI>PARENT-2-PROJECT_LOC/common/lpm_mcore.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/croutine.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/croutine.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/event_groups.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/event_groups.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/FreeRTOS.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/FreeRTOS.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/list.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/list.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/mpu_wrappers.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/mpu_wrappers.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/portable.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/portable.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/projdefs.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/projdefs.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/queue.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/queue.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/semphr.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/semphr.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/StackMacros.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/StackMacros.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/task.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/task.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/timers.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/include/timers.h</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/ccm_analog_imx7d.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/ccm_analog_imx7d.h</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/ccm_imx7d.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/ccm_imx7d.h</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/lmem.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/lmem.h</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/rdc.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/rdc.h</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/rdc_defs_imx7d.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/rdc_defs_imx7d.h</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/wdog_imx.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/wdog_imx.h</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/croutine.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/croutine.c</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/event_groups.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/event_groups.c</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/list.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/list.c</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/queue.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/queue.c</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/tasks.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/tasks.c</locationURI></link><link><name>freertos</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>freertos/timers.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/rtos/FreeRTOS/Source/timers.c</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/ccm_analog_imx7d.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/ccm_analog_imx7d.c</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/ccm_imx7d.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/ccm_imx7d.c</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/lmem.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/lmem.c</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/rdc.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/rdc.c</locationURI></link><link><name>system</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>system/wdog_imx.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/wdog_imx.c</locationURI></link><link><name>utilities</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>utilities/debug_console_imx.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/utilities/src/debug_console_imx.c</locationURI></link><link><name>utilities</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>utilities/debug_console_imx.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/utilities/inc/debug_console_imx.h</locationURI></link><link><name>utilities</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>utilities/print_scan.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/utilities/src/print_scan.c</locationURI></link><link><name>utilities</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>utilities/print_scan.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/utilities/src/print_scan.h</locationURI></link><link><name>startup</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>startup/system_MCIMX7D_M4.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/devices/MCIMX7D/startup/system_MCIMX7D_M4.c</locationURI></link><link><name>startup</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>startup/system_MCIMX7D_M4.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/devices/MCIMX7D/startup/system_MCIMX7D_M4.h</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/pin_mux.c</name><type>1</type><locationURI>PARENT-4-PROJECT_LOC/pin_mux.c</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/pin_mux.h</name><type>1</type><locationURI>PARENT-4-PROJECT_LOC/pin_mux.h</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/board.c</name><type>1</type><locationURI>PARENT-4-PROJECT_LOC/board.c</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/board.h</name><type>1</type><locationURI>PARENT-4-PROJECT_LOC/board.h</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/clock_freq.c</name><type>1</type><locationURI>PARENT-4-PROJECT_LOC/clock_freq.c</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/clock_freq.h</name><type>1</type><locationURI>PARENT-4-PROJECT_LOC/clock_freq.h</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/hardware_init.c</name><type>1</type><locationURI>PARENT-1-PROJECT_LOC/hardware_init.c</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/gpio_pins.c</name><type>1</type><locationURI>PARENT-4-PROJECT_LOC/gpio_pins.c</locationURI></link><link><name>board</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>board/gpio_pins.h</name><type>1</type><locationURI>PARENT-4-PROJECT_LOC/gpio_pins.h</locationURI></link><link><name>timer</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>timer/gpt_timer.c</name><type>1</type><locationURI>PARENT-1-PROJECT_LOC/gpt_timer.c</locationURI></link><link><name>timer</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>timer/gpt_timer.h</name><type>1</type><locationURI>PARENT-1-PROJECT_LOC/gpt_timer.h</locationURI></link><link><name>driver</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>driver/uart_imx.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/uart_imx.c</locationURI></link><link><name>driver</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>driver/uart_imx.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/uart_imx.h</locationURI></link><link><name>driver</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>driver/gpt.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/gpt.c</locationURI></link><link><name>driver</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>driver/gpt.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/gpt.h</locationURI></link><link><name>driver</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>driver/mu_imx.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/mu_imx.c</locationURI></link><link><name>driver</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>driver/mu_imx.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/mu_imx.h</locationURI></link><link><name>driver</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>driver/rdc_semaphore.c</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/src/rdc_semaphore.c</locationURI></link><link><name>driver</name><type>2</type><locationURI>virtual:/virtual</locationURI></link><link><name>driver/rdc_semaphore.h</name><type>1</type><locationURI>PARENT-6-PROJECT_LOC/platform/drivers/inc/rdc_semaphore.h</locationURI></link></linkedResources>
+	<variableList>
+	</variableList>
+</projectDescription>
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/gpt_timer.c b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/gpt_timer.c
new file mode 100644
index 0000000..e264072
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/gpt_timer.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/****************************************************************************
+*
+* Comments:
+*   This file contains the functions which write and read the SPI memories
+*   using the ECSPI driver in interrupt mode.
+*
+****************************************************************************/
+
+#include "FreeRTOS.h"
+#include "semphr.h"
+#include "gpt.h"
+#include "gpt_timer.h"
+#include "board.h"
+
+#define MAXIMUM_24M_DIV 15
+
+static SemaphoreHandle_t xSemaphore;
+
+void GPT_Timer_Init()
+{
+    gpt_init_config_t config = {
+        .freeRun    = false,
+        .waitEnable = true,
+        .stopEnable = true,
+        .dozeEnable = true,
+        .dbgEnable  = false,
+        .enableMode = true
+    };
+
+    xSemaphore = xSemaphoreCreateBinary();
+
+    /* Initialize GPT module */
+    GPT_Init(BOARD_GPTA_BASEADDR, &config);
+
+    /* Set GPT clock source to 24M OSC */
+    GPT_SetClockSource(BOARD_GPTA_BASEADDR, gptClockSourceOsc);
+
+    /* Set GPT interrupt priority 3 */
+    NVIC_SetPriority(BOARD_GPTA_IRQ_NUM, 3);
+
+    /* Enable NVIC interrupt */
+    NVIC_EnableIRQ(BOARD_GPTA_IRQ_NUM);
+}
+
+/*
+ * Set GPT to triggle interrupt in future time
+ */
+void GPT_Set_Timer_Delay(uint32_t ms)
+{
+    uint64_t counter = 24000ULL * ms; /* First get the counter needed by delay time */
+    uint32_t high;
+    uint32_t div24m, div;
+
+    /* Get the value that exceed maximum register counter */
+    high = (uint32_t)(counter >> 32);
+
+    div24m = MAXIMUM_24M_DIV; /*Since we use 24MHz as GPT peripheral clock, here we set the 24M divider to maximum value*/
+    div = high / (div24m + 1); /* Get PRESCALER value */
+
+    /* Now set prescaler */
+    GPT_SetOscPrescaler(BOARD_GPTA_BASEADDR, div24m);
+    GPT_SetPrescaler(BOARD_GPTA_BASEADDR, div);
+
+    /* Set GPT compare value */
+    GPT_SetOutputCompareValue(BOARD_GPTA_BASEADDR, gptOutputCompareChannel1,
+                              (uint32_t)(counter / (div24m + 1) / (div + 1)));
+
+    /* Enable GPT Output Compare1 interrupt */
+    GPT_SetIntCmd(BOARD_GPTA_BASEADDR, gptStatusFlagOutputCompare1, true);
+
+    /* GPT start */
+    GPT_Enable(BOARD_GPTA_BASEADDR);
+}
+
+/*
+ * Block the current task until GPT interrupt happens
+ */
+void GPT_Wait_Timer_Expire(void)
+{
+    /* Wait until next GPT event happens. */
+    xSemaphoreTake(xSemaphore, portMAX_DELAY);
+}
+
+/*
+ * GPT Interrupt Handler
+ */
+void BOARD_GPTA_HANDLER()
+{
+    BaseType_t xHigherPriorityTaskWoken;
+
+    /* When GPT timeout, we disable GPT to make sure this is a oneshot event */
+    GPT_Disable(BOARD_GPTA_BASEADDR);
+    GPT_SetIntCmd(BOARD_GPTA_BASEADDR, gptStatusFlagOutputCompare1, false);
+    GPT_ClearStatusFlag(BOARD_GPTA_BASEADDR, gptStatusFlagOutputCompare1);
+
+    xSemaphoreGiveFromISR(xSemaphore, &xHigherPriorityTaskWoken);
+    /*portYIELD_FROM_ISR is necessary to activate task switch immediately*/
+    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+}
+
+/*******************************************************************************
+ * EOF
+ ******************************************************************************/
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/gpt_timer.h b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/gpt_timer.h
new file mode 100644
index 0000000..0bab0ff
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/gpt_timer.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __GPT_TIMER_H__
+#define __GPT_TIMER_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*!
+ * @brief Initialize GPT timer, must be called before GPT_Timer_Delay().
+ */
+void GPT_Timer_Init(void);
+
+/*!
+ * @brief Block task for some time with GPT, this timer is not multi-thread
+ *  safe and could only called in one task.
+ *
+ * @param ms milliseconds to delay
+ */
+void GPT_Set_Timer_Delay(uint32_t ms);
+
+void GPT_Wait_Timer_Expire(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __GPT_TIMER_H__ */
+/*******************************************************************************
+ * EOF
+ ******************************************************************************/
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/hardware_init.c b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/hardware_init.c
new file mode 100644
index 0000000..d36d4f8
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/hardware_init.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "board.h"
+#include "gpio_pins.h"
+
+void hardware_init(void)
+{
+    uint32_t i;
+    /*
+     * Set GPC_LPCR_M4 to run. In Low Power Demo, when M4 enters STOP, the
+     * whole system may enter DSM. A7 will rekick A7 after exit DSM. GPC
+     * register status will not auto reset so a manual reset is performed
+     * here
+     * GPC RDC is default set by U-Boot to be shared by A7 and M4
+     */
+    GPC_LPCR_M4 = GPC_LPCR_M4 & (~GPC_LPCR_M4_LPM0_MASK);
+
+    /* Board specific RDC settings */
+    BOARD_RdcInit();
+
+    /* Board specific clock settings */
+    BOARD_ClockInit();
+
+    /*
+     * In order to wakeup M4 from LPM, all PLLCTRLs need to be set to "NeededRun"
+     */
+    for (i=0; i!=33; i++) {
+        CCM_BASE_PTR->PLL_CTRL[i].PLL_CTRL = ccmClockNeededRun;
+    }
+
+    /* initialize debug uart */
+    dbg_uart_init();
+
+    /* In this demo, we need to grasp board GPT exclusively */
+    RDC_SetPdapAccess(RDC, BOARD_GPTA_RDC_PDAP, 3 << (BOARD_DOMAIN_ID * 2), false, false);
+
+    /* Select GPTA clock derived from OSC24M */
+    CCM_UpdateRoot(CCM, BOARD_GPTA_CCM_ROOT, ccmRootmuxGptOsc24m, 0, 0);
+
+    /* Enable clock used by GPTA */
+    CCM_EnableRoot(CCM, BOARD_GPTA_CCM_ROOT);
+    CCM_ControlGate(CCM, BOARD_GPTA_CCM_CCGR, ccmClockNeededAll);
+
+    /* In this demo, we need GPT4 to work as a patch to fix GPC sync issue */
+    RDC_SetPdapAccess(RDC, BOARD_GPTB_RDC_PDAP, 3 << (BOARD_DOMAIN_ID * 2), false, false);
+
+    /* Select GPTB clock derived from OSC24M */
+    CCM_UpdateRoot(CCM, BOARD_GPTB_CCM_ROOT, ccmRootmuxGptOsc24m, 0, 0);
+
+    /* Enable clock used by GPTB */
+    CCM_EnableRoot(CCM, BOARD_GPTB_CCM_ROOT);
+    CCM_ControlGate(CCM, BOARD_GPTB_CCM_CCGR, ccmClockNeededAll);
+
+    /* Enable MU clock*/
+    CCM_ControlGate(CCM, BOARD_MU_CCM_CCGR, ccmClockNeededAll);
+}
+
+/*******************************************************************************
+ * EOF
+ ******************************************************************************/
diff --git a/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/main.c b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/main.c
new file mode 100644
index 0000000..3c75c46
--- /dev/null
+++ b/examples/imx7d_sdb_m4/demo_apps/low_power_imx7d/rand_wfi/main.c
@@ -0,0 +1,229 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+///////////////////////////////////////////////////////////////////////////////
+//  Includes
+///////////////////////////////////////////////////////////////////////////////
+#include "FreeRTOS.h"
+#include "stdlib.h"
+#include "task.h"
+#include "board.h"
+#include "debug_console_imx.h"
+#include "gpt_timer.h"
+#include "lpm_mcore.h"
+#if defined(__GNUC__)
+#include <errno.h>
+#include <stdio.h>
+#endif
+
+///////////////////////////////////////////////////////////////////////////////
+//  Macros
+///////////////////////////////////////////////////////////////////////////////
+#define PERIOD_MIN                      5
+#define PERIOD_MAX                      10
+
+////////////////////////////////////////////////////////////////////////////////
+// Code
+////////////////////////////////////////////////////////////////////////////////
+
+/*!
+ * @brief Set random time gpt timer to wakeup the system
+ */
+static uint32_t gpt_set_ramdom_period(uint32_t min_s, uint32_t max_s)
+{
+    uint32_t delay_s, delta_s;
+    /*Generate the random number*/
+    if (max_s <= min_s)
+        delay_s = min_s;
+    else {
+        delta_s = max_s - min_s;
+        delay_s = rand() % delta_s + min_s;
+    }
+
+    /*Set the GPT with delay_s, Taks will blocks until GPT event happens*/
+    GPT_Set_Timer_Delay(1000 * delay_s);
+    return delay_s;
+}
+
+/*!
+ * @brief the main power mode cycling task
+ */
+void LowPowerTask(void *pvParameters)
+{
+    uint32_t elapsed_time, total_time;
+    char control_char;
+
+    PRINTF("\r\nLow Power Demo\r\n");
+
+    /*
+     * Wait For A7 Side Become Ready
+     */
+    PRINTF("********************************\r\n");
+    PRINTF("Please wait :\r\n");
+    PRINTF("    1) A7 peer is ready\r\n");
+    PRINTF("Then press \"S\" to start the demo\r\n");
+    PRINTF("********************************\r\n");
+
+    for (;;) {
+        PRINTF("\r\nPress \"S\" to start the demo : ");
+        control_char = GETCHAR();
+        PRINTF("%c", control_char);
+        if ((control_char == 's') || (control_char == 'S')) {
+            break;
+        }
+    }
+    PRINTF("\r\n");
+
+    while (!LPM_MCORE_CheckPeerReady()) {
+        /*
+         * Note, when vTaskDelay is called, idle task hook function
+         * get opportunity to run
+         */
+        vTaskDelay(5);
+    }
+
+    LPM_MCORE_RegisterWakeupInterrupt(BOARD_GPC_BASEADDR, BOARD_GPTA_IRQ_NUM, GPC_IRQ_WAKEUP_ENABLE);
+
+    LPM_MCORE_SetSelfReady();
+
+    total_time = 0;
+    while(1)
+    {
+        switch (LPM_MCORE_GetPowerStatus(BOARD_GPC_BASEADDR)) {
+            case LPM_M4_STATE_RUN:
+                /*---> WAIT*/
+                LPM_MCORE_ChangeM4Clock(LPM_M4_LOW_FREQ);
+                LPM_MCORE_SetPowerStatus(BOARD_GPC_BASEADDR, LPM_M4_STATE_WAIT);
+                break;
+            case LPM_M4_STATE_WAIT:
+                /*---> STOP*/
+                LPM_MCORE_ChangeM4Clock(LPM_M4_LOW_FREQ);
+                LPM_MCORE_SetPowerStatus(BOARD_GPC_BASEADDR, LPM_M4_STATE_STOP);
+                break;
+            case LPM_M4_STATE_STOP:
+                /*---> RUN*/
+                LPM_MCORE_ChangeM4Clock(LPM_M4_HIGH_FREQ);
+                LPM_MCORE_SetPowerStatus(BOARD_GPC_BASEADDR, LPM_M4_STATE_RUN);
+                break;
+            default:
+                break;
+        }
+
+        elapsed_time = gpt_set_ramdom_period(PERIOD_MIN, PERIOD_MAX);
+        PRINTF("GPT will triggle interrupt in %ds\r\n", elapsed_time);
+
+        PRINTF("go to mode %s\r\n", LPM_MCORE_GetPowerStatusString());
+
+        /*wait GPT interrupt handler getting executed*/
+        GPT_Wait_Timer_Expire();
+        total_time += elapsed_time;
+        PRINTF("GPT Event! Total time %ds\r\n", total_time);
+    }
+}
+
+/*!
+ * @brief Custom function to be run in idletask
+ */
+void vApplicationIdleHook(void)
+{
+    /* Waiting for Wake up event. */
+    LPM_MCORE_WaitForInt();
+}
+
+/*!
+ * @brief Main function
+ */
+int main(void)
+{
+    // Initialize demo application pins setting and clock setting.
+    hardware_init();
+
+    PRINTF(" ************************************************************************\r\n");
+    PRINTF(" *          i.MX 7Dual Dual Core Low Power Demo - M4 side               *\r\n");
+    PRINTF(" *                                                                      *\r\n");
+    PRINTF(" *        A GPT will change the M4 Power Mode with random period        *\r\n");
+    PRINTF(" *                                                                      *\r\n");
+    PRINTF(" ************************************************************************\r\n");
+
+    // Init the GPT Timer
+    GPT_Timer_Init();
+
+    // Low Power Management Initialization
+    LPM_MCORE_Init(BOARD_GPC_BASEADDR);
+
+    // Create a demo task which will demo M4 core cycling through different power modes.
+    xTaskCreate(LowPowerTask, "Low Power Task", configMINIMAL_STACK_SIZE,           // xTaskGenericCreate
+                NULL, tskIDLE_PRIORITY+1, NULL);
+
+    // Start FreeRTOS scheduler.
+    vTaskStartScheduler();
+
+    // Should never reach this point.
+    while (true);
+}
+
+#if defined(__GNUC__)
+/*!
+ * @brief Function to override ARMGCC default function _sbrk
+ *
+ * _sbrk is called by malloc. ARMGCC default _sbrk compares "SP" register and
+ * heap end, if heap end is larger than "SP", then _sbrk returns error and
+ * memory allocation failed. This function changes to compare __HeapLimit with
+ * heap end.
+ *
+ * Then rand() function used in this project will call malloc in GCC compiler,
+ * so the customized version of _sbrk is needed here
+ */
+caddr_t _sbrk(int incr)
+{
+    extern uint32_t end __asm("end");
+    extern uint32_t heap_limit __asm("__HeapLimit");
+    static uint32_t *heap_end;
+    char *prev_heap_end;
+
+    if (heap_end == NULL)
+        heap_end = &end;
+
+    prev_heap_end = (char*)heap_end;
+
+    if (heap_end + incr > &heap_limit)
+    {
+        errno = ENOMEM;
+        return (caddr_t)-1;
+    }
+
+    heap_end += incr;
+
+    return (caddr_t)prev_heap_end;
+}
+#endif
+/*******************************************************************************
+ * EOF
+ ******************************************************************************/