diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2017-02-09 14:24:14 -0800 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2017-02-15 16:47:46 -0800 |
| commit | 66efdcd187473fe461642caf0675dae666c83027 (patch) | |
| tree | 0b1d9ce6c97748e4e3f32a94124f8f800b73088a /examples/imx7_colibri_m4/pin_mux.c | |
| parent | 0c5d4d438d4118c7931e6168fc59192e5f253762 (diff) | |
add defines for Colibri standard SPI
The Colibri standard SPI is connected to the SoCs ECSPI3 instance. Add
defines as BOARD_ECSPI_... Also add board level pinmux and clock
readout support.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'examples/imx7_colibri_m4/pin_mux.c')
| -rw-r--r-- | examples/imx7_colibri_m4/pin_mux.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/examples/imx7_colibri_m4/pin_mux.c b/examples/imx7_colibri_m4/pin_mux.c index 6c8cc0e..3c2b733 100644 --- a/examples/imx7_colibri_m4/pin_mux.c +++ b/examples/imx7_colibri_m4/pin_mux.c @@ -192,6 +192,36 @@ void configure_uart_pins(UART_Type* base) } } +void configure_ecspi_pins(ECSPI_Type* base) +{ + // ECSPI1 iomux configuration + /* daisy chain selection */ + IOMUXC_ECSPI3_MISO_SELECT_INPUT = 0; //(I2C1_SCL SODIM 90) + IOMUXC_ECSPI3_MOSI_SELECT_INPUT = 0; //(I2C1_SCL SODIM 90) + + /* iomux */ + IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_MUX_MODE(3); /* ECSPI SLK */ + IOMUXC_SW_MUX_CTL_PAD_I2C1_SDA = IOMUXC_SW_MUX_CTL_PAD_I2C1_SDA_MUX_MODE(3); /* ECSPI MOSI */ + IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL_MUX_MODE(3); /* ECSPI MISO */ + IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA = IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA_MUX_MODE(3); /* ECSPI SS0 */ + + /* pad control */ + IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL = IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_PE_MASK | + IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_PS(0) | /* pull down */ + IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_DSE(0) | + IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_HYS_MASK; + + IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA = IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_DSE(0) | + IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_HYS_MASK; + + IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL = IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL_HYS_MASK; + + IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA = IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_PE_MASK | + IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_PS(3) | /* pull up */ + IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_DSE(0) | + IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_HYS_MASK; +} + /******************************************************************************* * EOF ******************************************************************************/ |