summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorDominik Sliwa <dominik.sliwa@toradex.com>2018-02-14 16:53:49 +0100
committerDominik Sliwa <dominik.sliwa@toradex.com>2018-02-28 14:38:45 +0100
commit4a48136e9c6d55ff9d9427a91ef43d44d26333d7 (patch)
treebc8d4630e75c10ba6580cabedbba619a006aeca3 /drivers
parent3020f5caf0b09fcaf85b3b3fa84fdf688ba22cc0 (diff)
spi, can and general improvements
SPI: -move to single transfer read -clear interrupt register on read -perform multibyte read transfers with DMA -make frame format consistant CAN: -move from mailbox to CAN FIFO -implement buffering -support for reading multiple frames per transfer General: -use PLL at 100MHz -remove debug task -do not compile release with debug console enabled -bumped version to 0.13 Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/fsl_dspi.c54
-rw-r--r--drivers/fsl_dspi.h2
-rw-r--r--drivers/fsl_dspi_edma.c29
-rw-r--r--drivers/fsl_flexcan.c5
4 files changed, 67 insertions, 23 deletions
diff --git a/drivers/fsl_dspi.c b/drivers/fsl_dspi.c
index dcd93aa..0da640a 100644
--- a/drivers/fsl_dspi.c
+++ b/drivers/fsl_dspi.c
@@ -1248,9 +1248,9 @@ status_t DSPI_SlaveTransferNonBlocking(SPI_Type *base, dspi_slave_handle_t *hand
handle->errorCount = 0;
- uint8_t whichCtar = (transfer->configFlags & DSPI_SLAVE_CTAR_MASK) >> DSPI_SLAVE_CTAR_SHIFT;
- handle->bitsPerFrame =
- (((base->CTAR_SLAVE[whichCtar]) & SPI_CTAR_SLAVE_FMSZ_MASK) >> SPI_CTAR_SLAVE_FMSZ_SHIFT) + 1;
+ //uint8_t whichCtar = (transfer->configFlags & DSPI_SLAVE_CTAR_MASK) >> DSPI_SLAVE_CTAR_SHIFT;
+ handle->bitsPerFrame = 8;
+ //(((base->CTAR_SLAVE[whichCtar]) & SPI_CTAR_SLAVE_FMSZ_MASK) >> SPI_CTAR_SLAVE_FMSZ_SHIFT) + 1;
DSPI_StopTransfer(base);
@@ -1316,9 +1316,11 @@ static void DSPI_SlaveTransferFillUpTxFifo(SPI_Type *base, dspi_slave_handle_t *
/* Transmit data */
if (handle->remainingSendByteCount > 0)
{
+#if 0
/* Have data to transmit, update the transmit data and push to FIFO */
if (handle->bitsPerFrame <= 8)
{
+#endif
/* bits/frame is 1 byte */
if (handle->txData)
{
@@ -1333,6 +1335,7 @@ static void DSPI_SlaveTransferFillUpTxFifo(SPI_Type *base, dspi_slave_handle_t *
/* Decrease remaining dataSize */
--handle->remainingSendByteCount;
+#if 0
}
/* bits/frame is 2 bytes */
else
@@ -1375,6 +1378,7 @@ static void DSPI_SlaveTransferFillUpTxFifo(SPI_Type *base, dspi_slave_handle_t *
transmitData = (uint16_t)((uint16_t)(dummyPattern) << 8) | dummyPattern;
}
}
+#endif
}
else
{
@@ -1440,8 +1444,7 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle)
{
assert(handle);
- uint8_t dummyPattern = DSPI_DUMMY_DATA;
- uint32_t dataReceived;
+ volatile uint32_t dataReceived;
uint32_t dataSend = 0;
/* Because SPI protocol is synchronous, the number of bytes that that slave received from the
@@ -1462,12 +1465,15 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle)
DSPI_ClearStatusFlags(base, kDSPI_RxFifoDrainRequestFlag);
/* If bits/frame is one byte */
+#if 0
if (handle->bitsPerFrame <= 8)
{
+#endif
if (handle->rxData)
{
- if ((handle->totalByteCount - handle->remainingReceiveByteCount) == 1){
- if ( *(handle->rxData - 1) == APALIS_TK1_K20_BULK_WRITE_INST) {
+ if ((handle->totalByteCount - handle->remainingReceiveByteCount) == 2){
+
+ if ( *(handle->rxData - 2) == APALIS_TK1_K20_BULK_WRITE_INST) {
handle->remainingReceiveByteCount += dataReceived;
handle->totalByteCount += dataReceived;
handle->remainingSendByteCount += dataReceived;
@@ -1478,25 +1484,35 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle)
++handle->rxData;
}
- /* Descrease remaining receive byte count */
+ /* Decrease remaining receive byte count */
--handle->remainingReceiveByteCount;
-
+ if (handle->remainingSendByteCount == 0){
+ if ( *(handle->rxData - 2) == APALIS_TK1_K20_READ_INST)
+ {
+ base->PUSHR_SLAVE = registers[dataReceived];
+ }
+ else
+ {
+ base->PUSHR_SLAVE = 0x55;
+ }
+ }
if (handle->remainingSendByteCount > 0)
{
- if (handle->txData)
- {
- dataSend = *handle->txData;
- ++handle->txData;
- }
- else
- {
- dataSend = dummyPattern;
- }
+ if (handle->txData)
+ {
+ dataSend = *handle->txData;
+ ++handle->txData;
+ }
+ else
+ {
+ dataSend = dataReceived;
+ }
--handle->remainingSendByteCount;
/* Write the data to the DSPI data register */
base->PUSHR_SLAVE = dataSend;
}
+#if 0
}
else /* If bits/frame is 2 bytes */
{
@@ -1572,6 +1588,7 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle)
base->PUSHR_SLAVE = dataSend;
}
}
+#endif
/* Try to clear TFFF by writing a one to it; it will not clear if TX FIFO not full */
DSPI_ClearStatusFlags(base, kDSPI_TxFifoFillRequestFlag);
@@ -1585,6 +1602,7 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle)
if ((handle->remainingReceiveByteCount == 0) || (handle->state == kDSPI_Error))
{
/* Other cases, stop the transfer. */
+ dataReceived = base->POPR;
DSPI_SlaveTransferComplete(base, handle);
return;
}
diff --git a/drivers/fsl_dspi.h b/drivers/fsl_dspi.h
index 5dd96af..ae89c6d 100644
--- a/drivers/fsl_dspi.h
+++ b/drivers/fsl_dspi.h
@@ -50,7 +50,7 @@
#ifndef DSPI_DUMMY_DATA
/*! @brief DSPI dummy data if there is no Tx data.*/
-#define DSPI_DUMMY_DATA (0x00U) /*!< Dummy data used for Tx if there is no txData. */
+#define DSPI_DUMMY_DATA (0xBBU) /*!< Dummy data used for Tx if there is no txData. */
#endif
/*! @brief Status for the DSPI driver.*/
diff --git a/drivers/fsl_dspi_edma.c b/drivers/fsl_dspi_edma.c
index ef0d151..fa26b2f 100644
--- a/drivers/fsl_dspi_edma.c
+++ b/drivers/fsl_dspi_edma.c
@@ -1183,30 +1183,55 @@ status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle
return kStatus_Success;
}
-
+#if 0
static void EDMA_DspiSlaveCallback(edma_handle_t *edmaHandle,
void *g_dspiEdmaPrivateHandle,
bool transferDone,
uint32_t tcds)
{
+
assert(edmaHandle);
assert(g_dspiEdmaPrivateHandle);
dspi_slave_edma_private_handle_t *dspiEdmaPrivateHandle;
+
dspiEdmaPrivateHandle = (dspi_slave_edma_private_handle_t *)g_dspiEdmaPrivateHandle;
DSPI_DisableDMA((dspiEdmaPrivateHandle->base), kDSPI_RxDmaEnable | kDSPI_TxDmaEnable);
-
+ GPIO_ClearPinsOutput(GPIOE, 1u << 5u);
dspiEdmaPrivateHandle->handle->state = kDSPI_Idle;
if (dspiEdmaPrivateHandle->handle->callback)
{
+
dspiEdmaPrivateHandle->handle->callback(dspiEdmaPrivateHandle->base, dspiEdmaPrivateHandle->handle,
kStatus_Success, dspiEdmaPrivateHandle->handle->userData);
}
}
+#else
+extern dspi_slave_edma_handle_t g_dspi_edma_s_handle;
+static void EDMA_DspiSlaveCallback(edma_handle_t *edmaHandle,
+ void *g_dspiEdmaPrivateHandle,
+ bool transferDone,
+ uint32_t tcds)
+{
+
+ assert(edmaHandle);
+
+ DSPI_DisableDMA(SPI2, kDSPI_RxDmaEnable | kDSPI_TxDmaEnable);
+
+ g_dspi_edma_s_handle.state = kDSPI_Idle;
+
+ if (g_dspi_edma_s_handle.callback)
+ {
+
+ g_dspi_edma_s_handle.callback(SPI2, &g_dspi_edma_s_handle,
+ kStatus_Success, g_dspi_edma_s_handle.userData);
+ }
+}
+#endif
void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle)
{
assert(handle);
diff --git a/drivers/fsl_flexcan.c b/drivers/fsl_flexcan.c
index 8fd3399..6c7e0bd 100644
--- a/drivers/fsl_flexcan.c
+++ b/drivers/fsl_flexcan.c
@@ -402,19 +402,20 @@ void FLEXCAN_SetBaudRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t baudR
/* Assertion: Source clock should greater than baud rate * FLEXCAN_TIME_QUANTA_NUM. */
assert(priDiv <= sourceClock_Hz);
+
if (0 == priDiv)
{
priDiv = 1;
}
priDiv = (sourceClock_Hz / priDiv) - 1;
-
/* Desired baud rate is too low. */
if (priDiv > 0xFF)
{
priDiv = 0xFF;
}
+
/* FlexCAN timing setting formula:
* FLEXCAN_TIME_QUANTA_NUM = 1 + (PSEG1 + 1) + (PSEG2 + 1) + (PROPSEG + 1);
*/
@@ -768,7 +769,7 @@ void FLEXCAN_SetRxFifoConfig(CAN_Type *base, const flexcan_rx_fifo_config_t *con
FLEXCAN_SetRxMbConfig(base, 4, NULL, false);
FLEXCAN_SetRxMbConfig(base, 5, NULL, false);
}
-
+ base->MCR |= CAN_MCR_SRXDIS_MASK;
/* Exit Freeze Mode. */
FLEXCAN_ExitFreezeMode(base);
}