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authorDominik Sliwa <dominik.sliwa@toradex.com>2017-04-10 13:41:28 +0200
committerDominik Sliwa <dominik.sliwa@toradex.com>2017-04-10 13:41:28 +0200
commitd0e5a94a55334b0a27652959fba5066f56128135 (patch)
tree058987518e64691297b4409d5b06d65e9b335167
parentb3bc06bef795fdc57254729c74c04e2732a6092d (diff)
CAN and communication updates
-rw-r--r--drivers/fsl_dspi.c9
-rw-r--r--source/adc_task.c55
-rw-r--r--source/adc_task.h5
-rw-r--r--source/can_task.c14
-rw-r--r--source/can_task.h7
-rw-r--r--source/com_task.c25
-rw-r--r--source/com_task.h48
-rw-r--r--source/gpio_ext.c6
-rw-r--r--source/gpio_ext.h5
-rw-r--r--source/main.c5
10 files changed, 129 insertions, 50 deletions
diff --git a/drivers/fsl_dspi.c b/drivers/fsl_dspi.c
index b2f28ed..51da2d8 100644
--- a/drivers/fsl_dspi.c
+++ b/drivers/fsl_dspi.c
@@ -29,6 +29,7 @@
*/
#include "fsl_dspi.h"
+#include "com_task.h"
/*******************************************************************************
* Definitions
@@ -1434,6 +1435,7 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle)
uint8_t dummyPattern = DSPI_DUMMY_DATA;
uint32_t dataReceived;
uint32_t dataSend = 0;
+ //uint32_t dataCount = 0;
/* Because SPI protocol is synchronous, the number of bytes that that slave received from the
* master is the actual number of bytes that the slave transmitted to the master. So we only
@@ -1464,6 +1466,13 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle)
/* Descrease remaining receive byte count */
--handle->remainingReceiveByteCount;
+ /* dataCount = handle->totalByteCount - handle->remainingReceiveByteCount;
+
+ if (dataCount == 2 && (*(handle->rxData - 1) == APALIS_TK1_K20_BULK_WRITE_INST)
+ && (dataReceived < APALIS_TK1_K20_MAX_BULK))
+ handle->totalByteCount += dataReceived;
+*/
+
if (handle->remainingSendByteCount > 0)
{
if (handle->txData)
diff --git a/source/adc_task.c b/source/adc_task.c
index 67d5bd0..bd7215d 100644
--- a/source/adc_task.c
+++ b/source/adc_task.c
@@ -208,8 +208,10 @@ void tsc_task(void *pvParameters)
}
-int tsc_registers(uint8_t *rx_buf, uint8_t *tx_buf)
+int tsc_registers(dspi_transfer_t *spi_transfer)
{
+ uint8_t *rx_buf = spi_transfer->rxData;
+ uint8_t *tx_buf = &spi_transfer->txData[1];
if (rx_buf[0] == APALIS_TK1_K20_READ_INST) {
switch (rx_buf[1]) {
case APALIS_TK1_K20_TSCREG:
@@ -250,11 +252,24 @@ int tsc_registers(uint8_t *rx_buf, uint8_t *tx_buf)
return -ENOENT;
}
} else if (rx_buf[0] == APALIS_TK1_K20_BULK_READ_INST) {
- switch (rx_buf[1]){
- case APALIS_TK1_K20_TSC_XML:
- tx_buf[0] = gen_regs.tsc_xm & 0xFF;
- tx_buf[1] = (gen_regs.tsc_xm >> 8) & 0xFF;
- return 2;
+ if (rx_buf[2] == APALIS_TK1_K20_TSC_XML) {
+ if (rx_buf[1] == 2) {
+ tx_buf[0] = gen_regs.tsc_xm & 0xFF;
+ tx_buf[1] = (gen_regs.tsc_xm >> 8) & 0xFF;
+ return 2;
+ } else if (rx_buf[1] == 8) {
+ tx_buf[0] = gen_regs.tsc_xm & 0xFF;
+ tx_buf[1] = (gen_regs.tsc_xm >> 8) & 0xFF;
+ tx_buf[2] = gen_regs.tsc_xp & 0xFF;
+ tx_buf[3] = (gen_regs.tsc_xp >> 8) & 0xFF;
+ tx_buf[4] = gen_regs.tsc_ym & 0xFF;
+ tx_buf[5] = (gen_regs.tsc_ym >> 8) & 0xFF;
+ tx_buf[6] = gen_regs.tsc_yp & 0xFF;
+ tx_buf[7] = (gen_regs.tsc_yp >> 8) & 0xFF;
+ return 8;
+ }
+ }
+ switch (rx_buf[2]) {
case APALIS_TK1_K20_TSC_XPL:
tx_buf[0] = gen_regs.tsc_xp & 0xFF;
tx_buf[1] = (gen_regs.tsc_xp >> 8) & 0xFF;
@@ -274,8 +289,11 @@ int tsc_registers(uint8_t *rx_buf, uint8_t *tx_buf)
return -ENOENT;
}
-int adc_registers(uint8_t *rx_buf, uint8_t *tx_buf)
+int adc_registers(dspi_transfer_t *spi_transfer)
{
+ uint8_t *rx_buf = spi_transfer->rxData;
+ uint8_t *tx_buf = &spi_transfer->txData[1];
+
if (rx_buf[0] == APALIS_TK1_K20_READ_INST) {
switch (rx_buf[1]) {
case APALIS_TK1_K20_ADCREG:
@@ -316,11 +334,24 @@ int adc_registers(uint8_t *rx_buf, uint8_t *tx_buf)
return -ENOENT;
}
} else if (rx_buf[0] == APALIS_TK1_K20_BULK_READ_INST) {
- switch (rx_buf[1]){
- case APALIS_TK1_K20_ADC_CH0L:
- tx_buf[0] = gen_regs.adc[0] & 0xFF;
- tx_buf[1] = (gen_regs.adc[0] >> 8) & 0xFF;
- return 2;
+ if (rx_buf[2] == APALIS_TK1_K20_ADC_CH0L) {
+ if (rx_buf[1] == 2) {
+ tx_buf[0] = gen_regs.adc[0] & 0xFF;
+ tx_buf[1] = (gen_regs.adc[0] >> 8) & 0xFF;
+ return 2;
+ } else if (rx_buf[1] == 8) {
+ tx_buf[0] = gen_regs.adc[0] & 0xFF;
+ tx_buf[1] = (gen_regs.adc[0] >> 8) & 0xFF;
+ tx_buf[2] = gen_regs.adc[1] & 0xFF;
+ tx_buf[3] = (gen_regs.adc[1] >> 8) & 0xFF;
+ tx_buf[4] = gen_regs.adc[2] & 0xFF;
+ tx_buf[5] = (gen_regs.adc[2] >> 8) & 0xFF;
+ tx_buf[6] = gen_regs.adc[3] & 0xFF;
+ tx_buf[7] = (gen_regs.adc[3] >> 8) & 0xFF;
+ return 8;
+ }
+ }
+ switch (rx_buf[2]){
case APALIS_TK1_K20_ADC_CH1L:
tx_buf[0] = gen_regs.adc[1] & 0xFF;
tx_buf[1] = (gen_regs.adc[1] >> 8) & 0xFF;
diff --git a/source/adc_task.h b/source/adc_task.h
index 3dafddb..101bffd 100644
--- a/source/adc_task.h
+++ b/source/adc_task.h
@@ -6,14 +6,15 @@
#ifndef SOURCE_ADC_TASK_H_
#define SOURCE_ADC_TASK_H_
#include "board.h"
+#include "fsl_dspi.h"
#ifdef BOARD_USES_ADC
TaskHandle_t adc_task_handle;
TaskHandle_t tsc_task_handle;
void adc_task(void *pvParameters);
void tsc_task(void *pvParameters);
-int adc_registers(uint8_t *rx_buf, uint8_t *tx_buf);
-int tsc_registers(uint8_t *rx_buf, uint8_t *tx_buf);
+int adc_registers(dspi_transfer_t *spi_transfer);
+int tsc_registers(dspi_transfer_t *spi_transfer);
#endif
#endif /* SOURCE_ADC_TASK_H_ */
diff --git a/source/can_task.c b/source/can_task.c
index de57090..fbb84aa 100644
--- a/source/can_task.c
+++ b/source/can_task.c
@@ -147,7 +147,7 @@ static void CAN_Init()
}
-void can_test_task(void *pvParameters) {
+void can_task(void *pvParameters) {
flexcan_frame_t txFrame, rxFrame;
flexcan_mb_transfer_t txXfer, rxXfer;
callback_message_t cb_msg[2];
@@ -224,10 +224,18 @@ void can_test_task(void *pvParameters) {
vTaskDelete(NULL);
}
-int can0_registers(uint8_t *rx_buf, uint8_t *tx_buf){
+int can0_registers(dspi_transfer_t *spi_transfer)
+{
+ uint8_t *rx_buf = spi_transfer->rxData;
+ uint8_t *tx_buf = &spi_transfer->txData[1];
+
return -EIO;
}
-int can1_registers(uint8_t *rx_buf, uint8_t *tx_buf){
+int can1_registers(dspi_transfer_t *spi_transfer)
+{
+ uint8_t *rx_buf = spi_transfer->rxData;
+ uint8_t *tx_buf = &spi_transfer->txData[1];
+
return -EIO;
}
diff --git a/source/can_task.h b/source/can_task.h
index 9857e96..ce6eb18 100644
--- a/source/can_task.h
+++ b/source/can_task.h
@@ -8,10 +8,11 @@
/* FreeRTOS kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
+#include "fsl_dspi.h"
TaskHandle_t can_task_handle;
-void can_test_task(void *pvParameters);
-int can0_registers(uint8_t *rx_buf, uint8_t *tx_buf);
-int can1_registers(uint8_t *rx_buf, uint8_t *tx_buf);
+void can_task(void *pvParameters);
+int can0_registers(dspi_transfer_t *spi_transfer);
+int can1_registers(dspi_transfer_t *spi_transfer);
#endif /* SOURCE_CAN_TASK_H_ */
diff --git a/source/com_task.c b/source/com_task.c
index 457066c..01796d8 100644
--- a/source/com_task.c
+++ b/source/com_task.c
@@ -8,8 +8,8 @@
const uint32_t __attribute__((section(".FwVersion"))) fw_version = APALIS_TK1_K20_FW_VER;
static dspi_slave_handle_t spi_handle;
-static uint8_t slaveRxData[APALIS_TK1_K20_MAX_BULK] = {0U};
-static uint8_t slaveTxData[APALIS_TK1_K20_MAX_BULK] = {0U};
+static uint8_t slaveRxData[APALIS_TK1_K20_MAX_BULK + APALIS_TK1_K20_HEADER] = {0U};
+static uint8_t slaveTxData[APALIS_TK1_K20_MAX_BULK + APALIS_TK1_K20_HEADER] = {0U};
void generate_irq(uint8_t irq) {
gen_regs.irq = gen_regs.irq | BIT(irq);
@@ -67,7 +67,10 @@ void set_irq_reg(uint8_t value)
}
-inline int general_registers(uint8_t *rx_buf, uint8_t * tx_buf) {
+inline int general_registers(dspi_transfer_t *spi_transfer)
+{
+ uint8_t *rx_buf = spi_transfer->rxData;
+ uint8_t *tx_buf = &spi_transfer->txData[1];
if (rx_buf[0] == APALIS_TK1_K20_READ_INST) {
switch (rx_buf[1]) {
@@ -172,23 +175,23 @@ void spi_task(void *pvParameters) {
DSPI_SlaveTransferNonBlocking(SPI2, &spi_handle, &slaveXfer);
xSemaphoreTake(cb_msg.sem, portMAX_DELAY);
if (slaveRxData[1] <= 0x05) {
- ret = general_registers(slaveRxData, &slaveTxData[1]);
+ ret = general_registers(&slaveXfer);
} else if ((slaveRxData[1] >= APALIS_TK1_K20_CANREG + APALIS_TK1_K20_CAN_DEV_OFFSET(0))
- && (slaveRxData[1] <= APALIS_TK1_K20_CAN_OUT_FIF0_END + APALIS_TK1_K20_CAN_DEV_OFFSET(0))) {
- ret = can0_registers(slaveRxData, &slaveTxData[1]);
+ && (slaveRxData[1] <= APALIS_TK1_K20_CAN_OUT_BUF_END + APALIS_TK1_K20_CAN_DEV_OFFSET(0))) {
+ ret = can0_registers(&slaveXfer);
} else if ((slaveRxData[1] >= APALIS_TK1_K20_CANREG + APALIS_TK1_K20_CAN_DEV_OFFSET(1))
- && (slaveRxData[1] <= APALIS_TK1_K20_CAN_OUT_FIF0_END + APALIS_TK1_K20_CAN_DEV_OFFSET(1))) {
- ret = can1_registers(slaveRxData, &slaveTxData[1]);
+ && (slaveRxData[1] <= APALIS_TK1_K20_CAN_OUT_BUF_END + APALIS_TK1_K20_CAN_DEV_OFFSET(1))) {
+ ret = can1_registers(&slaveXfer);
#ifdef BOARD_USES_ADC
} else if ((slaveRxData[1] >= APALIS_TK1_K20_ADCREG) && (slaveRxData[1] <= APALIS_TK1_K20_ADC_CH3H)) {
- ret = adc_registers(slaveRxData, &slaveTxData[1]);
+ ret = adc_registers(&slaveXfer);
} else if ((slaveRxData[1] >= APALIS_TK1_K20_TSCREG) && (slaveRxData[1] <= APALIS_TK1_K20_TSC_YPH)) {
- ret = tsc_registers(slaveRxData, &slaveTxData[1]);
+ ret = tsc_registers(&slaveXfer);
#endif
} else if ((slaveRxData[1] >= APALIS_TK1_K20_GPIOREG) && (slaveRxData[1] <= APALIS_TK1_K20_GPIO_STA)) {
- ret = gpio_registers(slaveRxData, &slaveTxData[1]);
+ ret = gpio_registers(&slaveXfer);
} else {
/* Register not defined */
diff --git a/source/com_task.h b/source/com_task.h
index fb6b679..843d840 100644
--- a/source/com_task.h
+++ b/source/com_task.h
@@ -43,26 +43,32 @@ void spi_task(void *pvParameters);
#define APALIS_TK1_K20_MAX_BULK (64)
/* General registers*/
-#define APALIS_TK1_K20_STAREG 0x00 /* General status register RO */
+#define APALIS_TK1_K20_STAREG 0x00 /* general status register RO */
#define APALIS_TK1_K20_REVREG 0x01 /* FW revision register RO*/
#define APALIS_TK1_K20_IRQREG 0x02 /* IRQ status RW(write of 1 will reset the bit) */
-#define APALIS_TK1_K20_CTRREG 0x03 /* General control register RW */
+#define APALIS_TK1_K20_CTRREG 0x03 /* general control register RW */
#define APALIS_TK1_K20_MSQREG 0x04 /* IRQ mask register RW */
+/* 0x05-0x0F Reserved */
+
/* CAN Registers */
-#define APALIS_TK1_K20_CANREG 0x10 /* CAN control & status register RW */
-#define APALIS_TK1_K20_CANERR 0x11 /* Error register RW */
-#define APALIS_TK1_K20_CAN_BAUD_REG 0x12 /* CAN Baud set register RW */
-#define APALIS_TK1_K20_CAN_BIT_1 0x13 /* CAN Bittiming register 1 RW */
-#define APALIS_TK1_K20_CAN_BIT_2 0x14 /* CAN Bittiming register 2 RW */
-#define APALIS_TK1_K20_CAN_IN_BUF_CNT 0x15 /* CAN IN BUF Received Data Count RO */
-#define APALIS_TK1_K20_CAN_IN_BUF 0x16 /* CAN IN BUF RO */
-/* buffer size is 14 bytes */
-#define APALIS_TK1_K20_CAN_OUT_BUF_CNT 0x25 /* CAN OUT BUF Data Count WO */
-#define APALIS_TK1_K20_CAN_OUT_FIF0 0x26 /* CAN OUT BUF WO */
-/* buffer size is 14 bytes */
-#define APALIS_TK1_K20_CAN_OUT_FIF0_END 0x35 /* CAN OUT BUF END */
-#define APALIS_TK1_K20_CAN_DEV_OFFSET(x) (x ? 0 : 0x30)
+#define APALIS_TK1_K20_CANREG 0x10 /* CAN0 control & status register RW */
+#define APALIS_TK1_K20_CANERR 0x11 /* CAN0 error register RW */
+#define APALIS_TK1_K20_CAN_BAUD_REG 0x12 /* CAN0 baud set register RW */
+#define APALIS_TK1_K20_CAN_BIT_1 0x13 /* CAN0 bit timing register 1 RW */
+#define APALIS_TK1_K20_CAN_BIT_2 0x14 /* CAN0 bit timing register 2 RW */
+#define APALIS_TK1_K20_CAN_IN_BUF_CNT 0x15 /* CAN0 IN received data count RO */
+#define APALIS_TK1_K20_CAN_IN_BUF 0x16 /* CAN0 IN RO */
+/* buffer size is 13 bytes */
+#define APALIS_TK1_K20_CAN_OUT_BUF_CNT 0x23 /* CAN0 OUT data Count WO */
+#define APALIS_TK1_K20_CAN_OUT_FIF0 0x26 /* CAN0 OUT WO */
+/* buffer size is 13 bytes */
+#define APALIS_TK1_K20_CAN_OUT_BUF_END (APALIS_TK1_K20_CAN_OUT_FIF0 + 13 - 1)/* CAN OUT BUF END */
+#define APALIS_TK1_K20_CAN_DEV_OFFSET(x) (x ? 0x30 : 0)
+
+/* 0x33-0x3F Reserved */
+/* 0x40-0x62 CAN1 registers */
+/* 0x63-0x6F Reserved */
/* ADC Registers */
#define APALIS_TK1_K20_ADCREG 0x70 /* ADC control & status register RW */
@@ -75,6 +81,10 @@ void spi_task(void *pvParameters);
#define APALIS_TK1_K20_ADC_CH3L 0x77 /* ADC Channel 3 LSB RO */
#define APALIS_TK1_K20_ADC_CH3H 0x78 /* ADC Channel 3 MSB RO */
/* Bulk read of LSB register can be use to read entire 16-bit in one command */
+/* Bulk read of APALIS_TK1_K20_ADC_CH0L register can be use to read all
+ * ADC channels in one command */
+
+/* 0x79-0x7F reserved */
/* TSC Register */
#define APALIS_TK1_K20_TSCREG 0x80 /* TSC control & status register RW */
@@ -90,6 +100,8 @@ void spi_task(void *pvParameters);
#define APALIS_TK1_K20_TSC_ENA BIT(0)
#define APALIS_TK1_K20_TSC_ENA_MASK BIT(0)
+/* 0x89-0x8F Reserved */
+
/* GPIO Registers */
#define APALIS_TK1_K20_GPIOREG 0x90 /* GPIO control & status register RW */
#define APALIS_TK1_K20_GPIO_NO 0x91 /* currently configured GPIO RW */
@@ -98,6 +110,8 @@ void spi_task(void *pvParameters);
#define APALIS_TK1_K20_GPIO_STA_OE BIT(0)
#define APALIS_TK1_K20_GPIO_STA_VAL BIT(1)
+/* 0x93-0xFF Reserved */
+
/* Interrupt flags */
#define APALIS_TK1_K20_GEN_IRQ 0
#define APALIS_TK1_K20_CAN0_IRQ 1
@@ -109,11 +123,13 @@ void spi_task(void *pvParameters);
#define APALIS_TK1_K20_FW_VER 0x09
#define FW_MINOR (APALIS_TK1_K20_FW_VER & 0x0F)
-#define FW_MAJOR ((APALIS_TK1_K20_FW_VER & 0xF0) >> 8)
+#define FW_MAJOR ((APALIS_TK1_K20_FW_VER & 0xF0) >> 4)
#define TK1_K20_SENTINEL 0x55
#define TK1_K20_INVAL 0xAA
+#define APALIS_TK1_K20_HEADER 4
+
#define ADC0_CHANNEL_CNT 4
#define TSC0_CHANNEL_CNT 4
diff --git a/source/gpio_ext.c b/source/gpio_ext.c
index 5741cb5..977a42e 100644
--- a/source/gpio_ext.c
+++ b/source/gpio_ext.c
@@ -89,7 +89,11 @@ uint8_t get_gpio_status(uint8_t pin)
return status;
}
-int gpio_registers(uint8_t *rx_buf, uint8_t *tx_buf){
+int gpio_registers(dspi_transfer_t *spi_transfer)
+{
+ uint8_t *rx_buf = spi_transfer->rxData;
+ uint8_t *tx_buf = &spi_transfer->txData[1];
+
if (rx_buf[0] == APALIS_TK1_K20_READ_INST) {
switch (rx_buf[1]) {
case APALIS_TK1_K20_GPIOREG:
diff --git a/source/gpio_ext.h b/source/gpio_ext.h
index 5edbf3a..ed1316a 100644
--- a/source/gpio_ext.h
+++ b/source/gpio_ext.h
@@ -6,9 +6,10 @@
#ifndef SOURCE_GPIO_EXT_H_
#define SOURCE_GPIO_EXT_H_
+#include "board.h"
#include "fsl_device_registers.h"
#include "fsl_debug_console.h"
-#include "board.h"
+#include "fsl_dspi.h"
struct gpio_id{
PORT_Type *port;
@@ -68,6 +69,6 @@ struct gpio_id gpio_list [] = {
int is_gpio_valid(uint8_t pin);
int set_gpio_status(uint8_t status, uint8_t pin);
uint8_t get_gpio_status(uint8_t pin);
-int gpio_registers(uint8_t *rx_buf, uint8_t *tx_buf);
+int gpio_registers(dspi_transfer_t *spi_transfer);
#endif /* SOURCE_GPIO_EXT_H_ */
diff --git a/source/main.c b/source/main.c
index 341627d..5e6a9d3 100644
--- a/source/main.c
+++ b/source/main.c
@@ -95,6 +95,11 @@ int main(void) {
PRINTF("create SPI task error\r\n");
}
+ if(xTaskCreate(can_task, "CAN_task", 2000L / sizeof(portSTACK_TYPE), NULL, 2, &can_task_handle) != pdPASS)
+ {
+ PRINTF("create CAN task error\r\n");
+ }
+
#ifdef BOARD_USES_ADC
if(xTaskCreate(adc_task, "ADC_task", 2000L / sizeof(portSTACK_TYPE), NULL, 2, &adc_task_handle) != pdPASS)
{