summaryrefslogtreecommitdiff
path: root/overlays/verdin-imx8mm_sn65dsi84_overlay.dts
blob: da3dc744c240b41ae92cfd03c8b6236f1836d632 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
// Verdin DSI to LVDS Adapter orderable at Toradex.

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "dt-bindings/pwm/pwm.h"

/ {
	compatible = "toradex,verdin-imx8mm";
};

&{/} {
	backlight {
		compatible = "pwm-backlight";
		brightness-levels = <0 45 63 88 119 158 203 255>;
		default-brightness-level = <4>;
		/* Verdin MEZ_DSI_1_BKL_EN (SODIMM 21) */
		enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_mez_dsi_1_bkl_en>;
		power-supply = <&reg_3p3v>;
		/* Verdin MEZ_PWM_3_DSI (SODIMM 19) */
		pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>;
	};
};

&{/soc@0/bus@32c00000/display-subsystem} {
	status = "okay";
};

/* Verdin PWM_3_DSI */
&pwm1 {
	#pwm-cells = <3>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm_1>;
	status = "okay";
};

/* Verdin I2C_2_DSI */
&i2c2 {
	clock-frequency = <10000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

/* Verdin I2C_1 */
&i2c4 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	bridge@2c {
		compatible = "ti,sn65dsi83";
		/* Verdin MEZ_GPIO_1 (SODIMM 206) */
		enable-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_mez_gpio1>;
		reg = <0x2c>;
		ti,dsi-lanes = <4>;
		ti,height-mm = <136>;
		ti,lvds-bpp = <24>;
		ti,lvds-format = <2>;
		ti,width-mm = <217>;

		display-timings {
			native-mode = <&lvds_timing0>;

			lvds_timing0: lt170410_2whc {
				/*
				 * Take the minimum pixelclock as 71.1 MHz is
				 * not working on NXP i.MX8M Mini
				 */
				clock-frequency = <68900000>;
				hactive = <1280 1280 1280>;
				hfront-porch = <23 60 71>;
				hback-porch = <23 60 71>;
				hsync-len = <15 40 47>;
				vactive = <800 800 800>;
				vfront-porch = <5 7 10>;
				vback-porch = <5 7 10>;
				vsync-len = <6 9 12>;
				de-active = <1>;
				pixelclk-active = <0>;
			};
		};

		port {
			dsi85_in: endpoint {
				remote-endpoint = <&mipi_dsi_bridge1_out>;
			};
		};
	};

	touch@4a {
		compatible = "atmel,maxtouch";
		/* Verdin MEZ_DSI_1_INT# (SODIMM 17) */
		interrupt-parent = <&gpio3>;
		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_mez_dsi_1_int_n>, <&pinctrl_mez_gpio2>;
		reg = <0x4a>;
		/* Verdin MEZ_GPIO_2 (SODIMM 208) */
		reset-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
	};
};

&lcdif {
	status = "okay";
};

&mipi_dsi {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	port@1 {
		reg = <1>;

		mipi_dsi_bridge1_out: endpoint {
			remote-endpoint = <&dsi85_in>;
			attach-bridge;
		};
	};
};

&gpu {
	status = "okay";
};