diff options
Diffstat (limited to 'overlays/apalis-imx6_ov5640_overlay.dts')
-rw-r--r-- | overlays/apalis-imx6_ov5640_overlay.dts | 168 |
1 files changed, 77 insertions, 91 deletions
diff --git a/overlays/apalis-imx6_ov5640_overlay.dts b/overlays/apalis-imx6_ov5640_overlay.dts index f58777b..277e103 100644 --- a/overlays/apalis-imx6_ov5640_overlay.dts +++ b/overlays/apalis-imx6_ov5640_overlay.dts @@ -9,109 +9,95 @@ / { compatible = "toradex,apalis_imx6q"; - fragment@0 { - target-path="/"; - __overlay__ { - clk_ov5640_osc: clk_ov5640_osc_int { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <22000000>; - }; + clk_ov5640_osc: clk_ov5640_osc_int { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <22000000>; + }; - reg_ov5640_1v8_d_o_vdd: regulator-ov5640-1v8-d-o-vdd { - compatible = "regulator-fixed"; - regulator-name = "DOVDD/DVDD_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - vin-supply = <®_3v3_sw>; - }; + reg_ov5640_1v8_d_o_vdd: regulator-ov5640-1v8-d-o-vdd { + compatible = "regulator-fixed"; + regulator-name = "DOVDD/DVDD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + vin-supply = <®_3v3_sw>; + }; - reg_ov5640_2v8_a_vdd: regulator-ov5640-2v8-a-vdd { - compatible = "regulator-fixed"; - regulator-name = "AVDD/AFVDD_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - vin-supply = <®_3v3_sw>; - }; - }; + reg_ov5640_2v8_a_vdd: regulator-ov5640-2v8-a-vdd { + compatible = "regulator-fixed"; + regulator-name = "AVDD/AFVDD_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + vin-supply = <®_3v3_sw>; }; +}; - fragment@1 { - target-path = "/soc/aips-bus@2100000/i2c@21a8000"; - __overlay__ { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - ov5640_mipi@3c { - compatible = "ovti,ov5640"; - reg = <0x3c>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_cam_mclk_stash &pinctrl_apalis_gpio1 &pinctrl_csi_reset>; - clocks = <&clk_ov5640_osc>; - clock-names = "xclk"; - DOVDD-supply = <®_ov5640_1v8_d_o_vdd>; - AVDD-supply = <®_ov5640_2v8_a_vdd>; - DVDD-supply = <®_ov5640_1v8_d_o_vdd>; - powerdown-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; - status = "okay"; - - port { - /* MIPI CSI bus endpoint */ - ov5640_to_mipi_csi2: endpoint { - remote-endpoint = <&mipi_csi_from_ov5640>; - clock-lanes = <0>; - data-lanes = <1 2>; - }; - }; +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + ov5640_mipi@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cam_mclk_stash &pinctrl_apalis_gpio1 &pinctrl_csi_reset>; + clocks = <&clk_ov5640_osc>; + clock-names = "xclk"; + DOVDD-supply = <®_ov5640_1v8_d_o_vdd>; + AVDD-supply = <®_ov5640_2v8_a_vdd>; + DVDD-supply = <®_ov5640_1v8_d_o_vdd>; + powerdown-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + status = "okay"; + + port { + /* MIPI CSI bus endpoint */ + ov5640_to_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi_from_ov5640>; + clock-lanes = <0>; + data-lanes = <1 2>; }; }; }; +}; - fragment@2 { - target-path = "/soc/aips-bus@2100000/mipi@21dc000/"; - __overlay__ { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - port@0 { - reg = <0>; - - mipi_csi_from_ov5640: endpoint { - remote-endpoint = <&ov5640_to_mipi_csi2>; - clock-lanes = <0>; - data-lanes = <1 2>; - }; - }; +&mipi_csi { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + port@0 { + reg = <0>; + + mipi_csi_from_ov5640: endpoint { + remote-endpoint = <&ov5640_to_mipi_csi2>; + clock-lanes = <0>; + data-lanes = <1 2>; }; }; +}; - fragment@3 { - target-path = "/soc/aips-bus@2000000/iomuxc@20e0000/"; - __overlay__ { - pinctrl-0 = <&pinctrl_apalis_gpio2 &pinctrl_apalis_gpio3 - &pinctrl_apalis_gpio4 &pinctrl_apalis_gpio5 - &pinctrl_apalis_gpio6 &pinctrl_apalis_gpio7 - &pinctrl_apalis_gpio8 - >; - - pinctrl_cam_mclk_stash: cammclkstashgrp { - fsl,pins = < - /* CAM sys_mclk */ - MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x0000 - >; - }; +&iomuxc { + pinctrl-0 = <&pinctrl_apalis_gpio2 &pinctrl_apalis_gpio3 + &pinctrl_apalis_gpio4 &pinctrl_apalis_gpio5 + &pinctrl_apalis_gpio6 &pinctrl_apalis_gpio7 + &pinctrl_apalis_gpio8 + >; + + pinctrl_cam_mclk_stash: cammclkstashgrp { + fsl,pins = < + /* CAM sys_mclk */ + MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x0000 + >; + }; - pinctrl_csi_reset: csiresetgrp { - fsl,pins = < - MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 /* reset */ - >; - }; - }; + pinctrl_csi_reset: csiresetgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 /* reset */ + >; }; }; |