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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2021-07-15 14:53:18 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2021-07-15 15:42:11 +0200
commitca8581e7386cee96a0f090f2173fa2a13828db47 (patch)
tree58f8764db8f01dc6ed93481e011ecee885ce0e91
parent775ef91621f386ea0ef929683a4bb34b7b4e8913 (diff)
verdin-imx8mp: add overlay for supporting ov5640 on mezzanine
Related-to: ELB-4035 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-rw-r--r--overlays/Makefile1
-rw-r--r--overlays/verdin-imx8mp_mezzanine-ov5640_overlay.dts96
2 files changed, 97 insertions, 0 deletions
diff --git a/overlays/Makefile b/overlays/Makefile
index 8bb8cf9..fe1aa7d 100644
--- a/overlays/Makefile
+++ b/overlays/Makefile
@@ -89,6 +89,7 @@ dtb-y += verdin-imx8mm_sn65dsi84_overlay.dtbo
dtb-y += verdin-imx8mp_lt8912_overlay.dtbo
dtb-y += verdin-imx8mp_mezzanine-lvds-single-channel_overlay.dtbo
dtb-y += verdin-imx8mp_mezzanine-lvds-dual-channel_overlay.dtbo
+dtb-y += verdin-imx8mp_mezzanine-ov5640_overlay.dtbo
dtb-y += verdin-imx8mp_mezzanine-touch-atmel-mxt_overlay.dtbo
dtb-y += verdin-imx8mp_native-hdmi_overlay.dtbo
dtb-y += verdin-imx8mp_ov5640_overlay.dtbo
diff --git a/overlays/verdin-imx8mp_mezzanine-ov5640_overlay.dts b/overlays/verdin-imx8mp_mezzanine-ov5640_overlay.dts
new file mode 100644
index 0000000..4a5e7fc
--- /dev/null
+++ b/overlays/verdin-imx8mp_mezzanine-ov5640_overlay.dts
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2021 Toradex
+ */
+
+// Verdin iMX8M Plus Mezzanine orderable at Toradex.
+// CSI Camera Module 5MP OV5640 previously orderable at Toradex.
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "toradex,verdin-imx8mp";
+};
+
+&cameradev {
+ status = "okay";
+};
+
+/* Verdin I2C_2_DSI (JP3 2-3, JP4 2-3) */
+&i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ ov5640_mipi@3c {
+ assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
+ assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
+ assigned-clock-rates = <24000000>;
+ AVDD-supply = <&reg_3p3v>;
+ compatible = "ovti,ov5640";
+ clock-names = "xclk";
+ clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
+ csi_id = <1>;
+ DOVDD-supply = <&reg_3p3v>;
+ DVDD-supply = <&reg_3p3v>;
+ mclk = <24000000>;
+ mclk_source = <0>;
+ mipi_csi;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>;
+ /* Verdin GPIO2 (JP6 1-2) */
+ powerdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ PVDD-supply = <&reg_3p3v>;
+ reg = <0x3c>;
+ /* Verdin GPIO1 (JP5 1-2) */
+ reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ port {
+ ov5640_mipi_1_ep: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ remote-endpoint = <&mipi_csi1_ep>;
+ };
+ };
+ };
+};
+
+/* make sure Verdin GPIO1 and GPIO2 are NOT muxed by default to avoid any conflict */
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio3>, <&pinctrl_gpio4>,
+ <&pinctrl_gpio7>, <&pinctrl_gpio8>,
+ <&pinctrl_gpio_hog1>, <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>,
+ <&pinctrl_hdmi_hog>, <&pinctrl_pmic_tpm_ena>;
+};
+
+&isi_1 {
+ status = "okay";
+
+ cap_device {
+ status = "okay";
+ };
+};
+
+&mipi_csi_1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csi1_ep: endpoint {
+ csis-hs-settle = <13>;
+ csis-clk-settle = <2>;
+ csis-wclk;
+ data-lanes = <2>;
+ remote-endpoint = <&ov5640_mipi_1_ep>;
+ };
+ };
+};